arch: arm: imx6qdl-icore: Fix OTG_ID pin and sdcard detect

Message ID 1592594173-13497-1-git-send-email-sunil@amarulasolutions.com
State New
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  • arch: arm: imx6qdl-icore: Fix OTG_ID pin and sdcard detect
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Commit Message

Suniel Mahesh June 19, 2020, 7:16 p.m. UTC
From: Michael Trimarchi <michael@amarulasolutions.com>

The current pin muxing scheme muxes GPIO_1 pad for USB_OTG_ID
but the TRM mentions GPIO_1 pad is muxed for card detetcion,
because of which when card is inserted, usb otg is enumerated
and the card is never detected.

[   64.492645] cfg80211: failed to load regulatory.db
[   64.492657] imx-sdma 20ec000.sdma: external firmware not found, using ROM firmware
[   76.343711] ci_hdrc ci_hdrc.0: EHCI Host Controller
[   76.349742] ci_hdrc ci_hdrc.0: new USB bus registered, assigned bus number 2
[   76.388862] ci_hdrc ci_hdrc.0: USB 2.0 started, EHCI 1.00
[   76.396650] usb usb2: New USB device found, idVendor=1d6b, idProduct=0002, bcdDevice= 5.08
[   76.405412] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
[   76.412763] usb usb2: Product: EHCI Host Controller
[   76.417666] usb usb2: Manufacturer: Linux 5.8.0-rc1-next-20200618 ehci_hcd
[   76.424623] usb usb2: SerialNumber: ci_hdrc.0
[   76.431755] hub 2-0:1.0: USB hub found
[   76.435862] hub 2-0:1.0: 1 port detected

Fix the pin muxing as per TRM by muxing ENET_RX_ER pad for USB_OTG_ID
and GPIO_1 pad for card detect.

[   22.449165] mmc0: host does not support reading read-only switch, assuming write-enable
[   22.459992] mmc0: new high speed SDHC card at address 0001
[   22.469725] mmcblk0: mmc0:0001 EB1QT 29.8 GiB
[   22.478856]  mmcblk0: p1 p2

Cc: stable@vger.kernel.org
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
---
NOTE:
- patch tested on i.Core 1.5 MX6 DL
---
 arch/arm/boot/dts/imx6qdl-icore.dtsi | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Michael Nazzareno Trimarchi June 19, 2020, 7:42 p.m. UTC | #1
Hi

On Fri, Jun 19, 2020 at 9:16 PM Suniel Mahesh <sunil@amarulasolutions.com>
wrote:

> From: Michael Trimarchi <michael@amarulasolutions.com>
>
> The current pin muxing scheme muxes GPIO_1 pad for USB_OTG_ID
> but the TRM mentions GPIO_1 pad is muxed for card detetcion,
> because of which when card is inserted, usb otg is enumerated
> and the card is never detected.
>

Please rephrase, sorry to see only now. The card detect is muxed to GPIO_1

>
> [   64.492645] cfg80211: failed to load regulatory.db
> [   64.492657] imx-sdma 20ec000.sdma: external firmware not found, using
> ROM firmware
> [   76.343711] ci_hdrc ci_hdrc.0: EHCI Host Controller
> [   76.349742] ci_hdrc ci_hdrc.0: new USB bus registered, assigned bus
> number 2
> [   76.388862] ci_hdrc ci_hdrc.0: USB 2.0 started, EHCI 1.00
> [   76.396650] usb usb2: New USB device found, idVendor=1d6b,
> idProduct=0002, bcdDevice= 5.08
> [   76.405412] usb usb2: New USB device strings: Mfr=3, Product=2,
> SerialNumber=1
> [   76.412763] usb usb2: Product: EHCI Host Controller
> [   76.417666] usb usb2: Manufacturer: Linux 5.8.0-rc1-next-20200618
> ehci_hcd
> [   76.424623] usb usb2: SerialNumber: ci_hdrc.0
> [   76.431755] hub 2-0:1.0: USB hub found
> [   76.435862] hub 2-0:1.0: 1 port detected
>
> Fix the pin muxing as per TRM by muxing ENET_RX_ER pad for USB_OTG_ID
> and GPIO_1 pad for card detect.
>

The OTG_ID is muxed on  ENET_RX_ER

Michael

>
> [   22.449165] mmc0: host does not support reading read-only switch,
> assuming write-enable
> [   22.459992] mmc0: new high speed SDHC card at address 0001
> [   22.469725] mmcblk0: mmc0:0001 EB1QT 29.8 GiB
> [   22.478856]  mmcblk0: p1 p2
>
> Cc: stable@vger.kernel.org
> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com>
> ---
> NOTE:
> - patch tested on i.Core 1.5 MX6 DL
> ---
>  arch/arm/boot/dts/imx6qdl-icore.dtsi | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/imx6qdl-icore.dtsi
> b/arch/arm/boot/dts/imx6qdl-icore.dtsi
> index 756f3a9..12997da 100644
> --- a/arch/arm/boot/dts/imx6qdl-icore.dtsi
> +++ b/arch/arm/boot/dts/imx6qdl-icore.dtsi
> @@ -397,7 +397,7 @@
>
>         pinctrl_usbotg: usbotggrp {
>                 fsl,pins = <
> -                       MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
> +                       MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
>                 >;
>         };
>
> @@ -409,6 +409,7 @@
>                         MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17070
>                         MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17070
>                         MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17070
> +                       MX6QDL_PAD_GPIO_1__GPIO1_IO01  0x1b0b0
>                 >;
>         };
>
> --
> 2.7.4
>
>

Patch

diff --git a/arch/arm/boot/dts/imx6qdl-icore.dtsi b/arch/arm/boot/dts/imx6qdl-icore.dtsi
index 756f3a9..12997da 100644
--- a/arch/arm/boot/dts/imx6qdl-icore.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-icore.dtsi
@@ -397,7 +397,7 @@ 
 
 	pinctrl_usbotg: usbotggrp {
 		fsl,pins = <
-			MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
+			MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
 		>;
 	};
 
@@ -409,6 +409,7 @@ 
 			MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17070
 			MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17070
 			MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17070
+			MX6QDL_PAD_GPIO_1__GPIO1_IO01  0x1b0b0
 		>;
 	};