| Message ID | 20181116163916.29621-2-jagan@amarulasolutions.com |
|---|---|
| State | New |
| Headers | show |
| Series |
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| Related | show |
On Fri, Nov 16, 2018 at 10:09:05PM +0530, Jagan Teki wrote: > Loop N1 instruction delay for burst mode lcd panel are > computed as per BSP code. > > Reference code is available in BSP (from linux-sunxi > drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c) > > dsi_dev[sel]->dsi_inst_loop_num.bits.loop_n1= > (panel->lcd_ht-panel->lcd_x)*(150)/(panel->lcd_dclk_freq*8) - 50; > => (((mode->htotal - mode->hdisplay) * 150) / > ((mode->clock / 1000) * 8)) - 50; > > So use the similar computation for loop N1 delay. > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> *why* are you doing this? What is it fixing? on which devices? Maxime
On Mon, Nov 19, 2018 at 1:57 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > On Fri, Nov 16, 2018 at 10:09:05PM +0530, Jagan Teki wrote: > > Loop N1 instruction delay for burst mode lcd panel are > > computed as per BSP code. > > > > Reference code is available in BSP (from linux-sunxi > > drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c) > > > > dsi_dev[sel]->dsi_inst_loop_num.bits.loop_n1= > > (panel->lcd_ht-panel->lcd_x)*(150)/(panel->lcd_dclk_freq*8) - 50; > > => (((mode->htotal - mode->hdisplay) * 150) / > > ((mode->clock / 1000) * 8)) - 50; > > > > So use the similar computation for loop N1 delay. > > > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > > *why* are you doing this? What is it fixing? on which devices? You mentioned the separate function to compute the delay for all modes [1], ie what I did. did I missing anything? [1] https://patchwork.kernel.org/patch/10666599/
On Mon, Nov 19, 2018 at 04:28:29PM +0530, Jagan Teki wrote: > On Mon, Nov 19, 2018 at 1:57 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > > > On Fri, Nov 16, 2018 at 10:09:05PM +0530, Jagan Teki wrote: > > > Loop N1 instruction delay for burst mode lcd panel are > > > computed as per BSP code. > > > > > > Reference code is available in BSP (from linux-sunxi > > > drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c) > > > > > > dsi_dev[sel]->dsi_inst_loop_num.bits.loop_n1= > > > (panel->lcd_ht-panel->lcd_x)*(150)/(panel->lcd_dclk_freq*8) - 50; > > > => (((mode->htotal - mode->hdisplay) * 150) / > > > ((mode->clock / 1000) * 8)) - 50; > > > > > > So use the similar computation for loop N1 delay. > > > > > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > > > > *why* are you doing this? What is it fixing? on which devices? > > You mentioned the separate function to compute the delay for all modes > [1], ie what I did. did I missing anything? You're missing that you are never explaining why that patch is needed in the first place. Or answering the question I asked a couple of lines above. Maxime
On Tue, Nov 20, 2018 at 6:53 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > On Mon, Nov 19, 2018 at 04:28:29PM +0530, Jagan Teki wrote: > > On Mon, Nov 19, 2018 at 1:57 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > > > > > On Fri, Nov 16, 2018 at 10:09:05PM +0530, Jagan Teki wrote: > > > > Loop N1 instruction delay for burst mode lcd panel are > > > > computed as per BSP code. > > > > > > > > Reference code is available in BSP (from linux-sunxi > > > > drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c) > > > > > > > > dsi_dev[sel]->dsi_inst_loop_num.bits.loop_n1= > > > > (panel->lcd_ht-panel->lcd_x)*(150)/(panel->lcd_dclk_freq*8) - 50; > > > > => (((mode->htotal - mode->hdisplay) * 150) / > > > > ((mode->clock / 1000) * 8)) - 50; > > > > > > > > So use the similar computation for loop N1 delay. > > > > > > > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > > > > > > *why* are you doing this? What is it fixing? on which devices? > > > > You mentioned the separate function to compute the delay for all modes > > [1], ie what I did. did I missing anything? > > You're missing that you are never explaining why that patch is needed > in the first place. Or answering the question I asked a couple of > lines above. OK. The instruction delay varies between video and burst mode. for burst mode panels it is computed based on the panel clock along with horizontal sync+porch timings. Got it, the same I need to update on commit, since you asked about separate delay route I thought you get the proper details.
On Tue, Nov 20, 2018 at 07:06:30PM +0530, Jagan Teki wrote: > On Tue, Nov 20, 2018 at 6:53 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > > > On Mon, Nov 19, 2018 at 04:28:29PM +0530, Jagan Teki wrote: > > > On Mon, Nov 19, 2018 at 1:57 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > > > > > > > On Fri, Nov 16, 2018 at 10:09:05PM +0530, Jagan Teki wrote: > > > > > Loop N1 instruction delay for burst mode lcd panel are > > > > > computed as per BSP code. > > > > > > > > > > Reference code is available in BSP (from linux-sunxi > > > > > drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c) > > > > > > > > > > dsi_dev[sel]->dsi_inst_loop_num.bits.loop_n1= > > > > > (panel->lcd_ht-panel->lcd_x)*(150)/(panel->lcd_dclk_freq*8) - 50; > > > > > => (((mode->htotal - mode->hdisplay) * 150) / > > > > > ((mode->clock / 1000) * 8)) - 50; > > > > > > > > > > So use the similar computation for loop N1 delay. > > > > > > > > > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > > > > > > > > *why* are you doing this? What is it fixing? on which devices? > > > > > > You mentioned the separate function to compute the delay for all modes > > > [1], ie what I did. did I missing anything? > > > > You're missing that you are never explaining why that patch is needed > > in the first place. Or answering the question I asked a couple of > > lines above. > > OK. > > The instruction delay varies between video and burst mode. for burst > mode panels it is computed based on the panel clock along with > horizontal sync+porch timings. You're still stating a fact. What issue, that you experienced, are you trying to solve here? Maxime
On Tue, Nov 20, 2018 at 7:59 AM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > On Tue, Nov 20, 2018 at 07:06:30PM +0530, Jagan Teki wrote: > > On Tue, Nov 20, 2018 at 6:53 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > > > > > On Mon, Nov 19, 2018 at 04:28:29PM +0530, Jagan Teki wrote: > > > > On Mon, Nov 19, 2018 at 1:57 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > > > > > > > > > On Fri, Nov 16, 2018 at 10:09:05PM +0530, Jagan Teki wrote: > > > > > > Loop N1 instruction delay for burst mode lcd panel are > > > > > > computed as per BSP code. > > > > > > > > > > > > Reference code is available in BSP (from linux-sunxi > > > > > > drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c) > > > > > > > > > > > > dsi_dev[sel]->dsi_inst_loop_num.bits.loop_n1= > > > > > > (panel->lcd_ht-panel->lcd_x)*(150)/(panel->lcd_dclk_freq*8) - 50; > > > > > > => (((mode->htotal - mode->hdisplay) * 150) / > > > > > > ((mode->clock / 1000) * 8)) - 50; > > > > > > > > > > > > So use the similar computation for loop N1 delay. > > > > > > > > > > > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > > > > > > > > > > *why* are you doing this? What is it fixing? on which devices? > > > > > > > > You mentioned the separate function to compute the delay for all modes > > > > [1], ie what I did. did I missing anything? > > > > > > You're missing that you are never explaining why that patch is needed > > > in the first place. Or answering the question I asked a couple of > > > lines above. > > > > OK. > > > > The instruction delay varies between video and burst mode. for burst > > mode panels it is computed based on the panel clock along with > > horizontal sync+porch timings. > > You're still stating a fact. What issue, that you experienced, are you > trying to solve here? IIRC that's what BSP driver does. Otherwise panels that use burst mode just don't work. > Maxime > > -- > Maxime Ripard, Bootlin > Embedded Linux and Kernel engineering > https://bootlin.com
On Tue, Nov 20, 2018 at 9:29 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > On Tue, Nov 20, 2018 at 07:06:30PM +0530, Jagan Teki wrote: > > On Tue, Nov 20, 2018 at 6:53 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > > > > > On Mon, Nov 19, 2018 at 04:28:29PM +0530, Jagan Teki wrote: > > > > On Mon, Nov 19, 2018 at 1:57 PM Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > > > > > > > > > On Fri, Nov 16, 2018 at 10:09:05PM +0530, Jagan Teki wrote: > > > > > > Loop N1 instruction delay for burst mode lcd panel are > > > > > > computed as per BSP code. > > > > > > > > > > > > Reference code is available in BSP (from linux-sunxi > > > > > > drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c) > > > > > > > > > > > > dsi_dev[sel]->dsi_inst_loop_num.bits.loop_n1= > > > > > > (panel->lcd_ht-panel->lcd_x)*(150)/(panel->lcd_dclk_freq*8) - 50; > > > > > > => (((mode->htotal - mode->hdisplay) * 150) / > > > > > > ((mode->clock / 1000) * 8)) - 50; > > > > > > > > > > > > So use the similar computation for loop N1 delay. > > > > > > > > > > > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > > > > > > > > > > *why* are you doing this? What is it fixing? on which devices? > > > > > > > > You mentioned the separate function to compute the delay for all modes > > > > [1], ie what I did. did I missing anything? > > > > > > You're missing that you are never explaining why that patch is needed > > > in the first place. Or answering the question I asked a couple of > > > lines above. > > > > OK. > > > > The instruction delay varies between video and burst mode. for burst > > mode panels it is computed based on the panel clock along with > > horizontal sync+porch timings. > > You're still stating a fact. What issue, that you experienced, are you > trying to solve here? This change is specific for burst mode instruction delay. for non-burst it is 50 - 1 and for burst mode it is computed as mentioned in commit message. Both things are available in BSP code. and without this burst mode panels not working with existing (50 - 1)
diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c index def145086a5c..43ab7127d428 100644 --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c @@ -379,6 +379,24 @@ static u16 sun6i_dsi_get_timings_vblk(struct sun6i_dsi *dsi, return vblk; } +static u16 sun6i_dsi_setup_inst_delay(struct sun6i_dsi *dsi, + struct drm_display_mode *mode) +{ + struct mipi_dsi_device *device = dsi->device; + u32 hsync_porch, dclk; + u16 delay; + + hsync_porch = (mode->htotal - mode->hdisplay); + dclk = (mode->clock / 1000); + + if (device->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) + delay = ((hsync_porch * 150) / (dclk * 8)) - 50; + else + delay = 50 - 1; + + return delay; +} + static u16 sun6i_dsi_get_video_start_delay(struct sun6i_dsi *dsi, struct drm_display_mode *mode) { @@ -418,7 +436,7 @@ static void sun6i_dsi_setup_burst(struct sun6i_dsi *dsi, static void sun6i_dsi_setup_inst_loop(struct sun6i_dsi *dsi, struct drm_display_mode *mode) { - u16 delay = 50 - 1; + u16 delay = sun6i_dsi_setup_inst_delay(dsi, mode); regmap_write(dsi->regs, SUN6I_DSI_INST_LOOP_NUM_REG(0), SUN6I_DSI_INST_LOOP_NUM_N0(50 - 1) |
Loop N1 instruction delay for burst mode lcd panel are computed as per BSP code. Reference code is available in BSP (from linux-sunxi drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c) dsi_dev[sel]->dsi_inst_loop_num.bits.loop_n1= (panel->lcd_ht-panel->lcd_x)*(150)/(panel->lcd_dclk_freq*8) - 50; => (((mode->htotal - mode->hdisplay) * 150) / ((mode->clock / 1000) * 8)) - 50; So use the similar computation for loop N1 delay. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> --- drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-)