Message ID | 20240421140745.25870-1-michael@amarulasolutions.com |
---|---|
State | New |
Headers | show |
Series |
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Related | show |
Hi Michael, On Sun, Apr 21, 2024 at 11:07 AM Michael Trimarchi <michael@amarulasolutions.com> wrote: > > Add clocks support for the video subsystem. > > Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Which target will make use of these clocks? As-is this patch adds only dead code. Adding a defconfig that uses these newly introduced clocks would be nice. Also, to avoid size increase, please protect this code against CONFIG_VIDEO or something, like done here: https://source.denx.de/u-boot/custodians/u-boot-imx/-/commit/2b3310ef13998dfd03196a0806e03035212b102c To unsubscribe from this group and stop receiving emails from it, send an email to linux-amarula+unsubscribe@amarulasolutions.com.
Hi Fabio On Sun, Apr 21, 2024 at 10:24 PM Fabio Estevam <festevam@gmail.com> wrote: > > Hi Michael, > > On Sun, Apr 21, 2024 at 11:07 AM Michael Trimarchi > <michael@amarulasolutions.com> wrote: > > > > Add clocks support for the video subsystem. > > > > Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> > > Which target will make use of these clocks? > > As-is this patch adds only dead code. > > Adding a defconfig that uses these newly introduced clocks would be nice. > You are right, I will wrap it and enable only on CONFIG_VIDEO > Also, to avoid size increase, please protect this code against > CONFIG_VIDEO or something, like done here: > https://source.denx.de/u-boot/custodians/u-boot-imx/-/commit/2b3310ef13998dfd03196a0806e03035212b102c Working on display panel integration on imx8m, trying to progress merging things up. Michael
Hi Fabio On Sun, Apr 21, 2024 at 10:54 PM Michael Nazzareno Trimarchi <michael@amarulasolutions.com> wrote: > > Hi Fabio > > On Sun, Apr 21, 2024 at 10:24 PM Fabio Estevam <festevam@gmail.com> wrote: > > > > Hi Michael, > > > > On Sun, Apr 21, 2024 at 11:07 AM Michael Trimarchi > > <michael@amarulasolutions.com> wrote: > > > > > > Add clocks support for the video subsystem. > > > > > > Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> > > > > Which target will make use of these clocks? > > > > As-is this patch adds only dead code. > > > > Adding a defconfig that uses these newly introduced clocks would be nice. > > > > You are right, I will wrap it and enable only on CONFIG_VIDEO > > > Also, to avoid size increase, please protect this code against > > CONFIG_VIDEO or something, like done here: > > https://source.denx.de/u-boot/custodians/u-boot-imx/-/commit/2b3310ef13998dfd03196a0806e03035212b102c > > Working on display panel integration on imx8m, trying to progress > merging things up. > Are you considering if I wrap properly with VIDEO IS_ENABLED? Michael > Michael > > > > -- > Michael Nazzareno Trimarchi > Co-Founder & Chief Executive Officer > M. +39 347 913 2170 > michael@amarulasolutions.com > __________________________________ > > Amarula Solutions BV > Joop Geesinkweg 125, 1114 AB, Amsterdam, NL > T. +31 (0)85 111 9172 > info@amarulasolutions.com > www.amarulasolutions.com
Hi Michael,
On Mon, Apr 22, 2024 at 7:36 AM Michael Nazzareno Trimarchi
<michael@amarulasolutions.com> wrote:
> Are you considering if I wrap properly with VIDEO IS_ENABLED?
I prefer you resend this patch as part of a complete series that adds
panel support to an imx8mn board target.
Otherwise, if this gets in as-is, it will become a dead code, which we
want to avoid.
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Hi Fabio On Mon, Apr 22, 2024 at 1:17 PM Fabio Estevam <festevam@gmail.com> wrote: > > Hi Michael, > > On Mon, Apr 22, 2024 at 7:36 AM Michael Nazzareno Trimarchi > <michael@amarulasolutions.com> wrote: > > > Are you considering if I wrap properly with VIDEO IS_ENABLED? > > I prefer you resend this patch as part of a complete series that adds > panel support to an imx8mn board target. > > Otherwise, if this gets in as-is, it will become a dead code, which we > want to avoid. You can find here how video series is going, I will post it soon https://patchwork.amarulasolutions.com/project/linux-amarula/list/ Michael
diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c index 457acb8a40..baac79dd29 100644 --- a/drivers/clk/imx/clk-imx8mn.c +++ b/drivers/clk/imx/clk-imx8mn.c @@ -23,6 +23,7 @@ static const char *arm_pll_bypass_sels[] = {"arm_pll", "arm_pll_ref_sel", }; static const char *sys_pll1_bypass_sels[] = {"sys_pll1", "sys_pll1_ref_sel", }; static const char *sys_pll2_bypass_sels[] = {"sys_pll2", "sys_pll2_ref_sel", }; static const char *sys_pll3_bypass_sels[] = {"sys_pll3", "sys_pll3_ref_sel", }; +static const char *video_pll_bypass_sels[] = {"video_pll", "video_pll_ref_sel", }; static const char *imx8mn_a53_sels[] = {"clock-osc-24m", "arm_pll_out", "sys_pll2_500m", "sys_pll2_1000m", "sys_pll1_800m", "sys_pll1_400m", "audio_pll1_out", "sys_pll3_out", }; @@ -30,6 +31,10 @@ static const char *imx8mn_a53_sels[] = {"clock-osc-24m", "arm_pll_out", "sys_pll static const char *imx8mn_ahb_sels[] = {"clock-osc-24m", "sys_pll1_133m", "sys_pll1_800m", "sys_pll1_400m", "sys_pll2_125m", "sys_pll3_out", "audio_pll1_out", "video_pll_out", }; +static const char *imx8mn_disp_pixel_sels[] = {"osc_24m", "video_pll_out", "audio_pll2_out", + "audio_pll1_out", "sys_pll1_800m", "sys_pll2_1000m", + "sys_pll3_out", "clk_ext4", }; + static const char *imx8mn_enet_axi_sels[] = {"clock-osc-24m", "sys_pll1_266m", "sys_pll1_800m", "sys_pll2_250m", "sys_pll2_200m", "audio_pll1_out", "video_pll_out", "sys_pll3_out", }; @@ -139,6 +144,9 @@ static int imx8mn_clk_probe(struct udevice *dev) clk_dm(IMX8MN_SYS_PLL3_REF_SEL, imx_clk_mux("sys_pll3_ref_sel", base + 0x114, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels))); + clk_dm(IMX8MN_VIDEO_PLL1_REF_SEL, + imx_clk_mux("video_pll_ref_sel", base + 0x28, 0, 2, + pll_ref_sels, ARRAY_SIZE(pll_ref_sels))); clk_dm(IMX8MN_DRAM_PLL, imx_clk_pll14xx("dram_pll", "dram_pll_ref_sel", @@ -155,6 +163,9 @@ static int imx8mn_clk_probe(struct udevice *dev) clk_dm(IMX8MN_SYS_PLL3, imx_clk_pll14xx("sys_pll3", "sys_pll3_ref_sel", base + 0x114, &imx_1416x_pll)); + clk_dm(IMX8MN_VIDEO_PLL1, + imx_clk_pll14xx("video_pll", "video_pll_ref_sel", + base + 0x28, &imx_1443x_pll)); /* PLL bypass out */ clk_dm(IMX8MN_DRAM_PLL_BYPASS, @@ -183,6 +194,12 @@ static int imx8mn_clk_probe(struct udevice *dev) ARRAY_SIZE(sys_pll3_bypass_sels), CLK_SET_RATE_PARENT)); + clk_dm(IMX8MN_VIDEO_PLL1_BYPASS, + imx_clk_mux_flags("video_pll_bypass", base + 0x28, 16, 1, + video_pll_bypass_sels, + ARRAY_SIZE(video_pll_bypass_sels), + CLK_SET_RATE_PARENT)); + /* PLL out gate */ clk_dm(IMX8MN_DRAM_PLL_OUT, imx_clk_gate("dram_pll_out", "dram_pll_bypass", @@ -199,6 +216,9 @@ static int imx8mn_clk_probe(struct udevice *dev) clk_dm(IMX8MN_SYS_PLL3_OUT, imx_clk_gate("sys_pll3_out", "sys_pll3_bypass", base + 0x114, 11)); + clk_dm(IMX8MN_VIDEO_PLL1_OUT, + imx_clk_gate("video_pll_out", "video_pll_bypass", + base + 0x28, 13)); /* SYS PLL fixed output */ clk_dm(IMX8MN_SYS_PLL1_40M, @@ -275,6 +295,9 @@ static int imx8mn_clk_probe(struct udevice *dev) clk_dm(IMX8MN_CLK_USDHC2, imx8m_clk_composite("usdhc2", imx8mn_usdhc2_sels, base + 0xac80)); + + clk_dm(IMX8MN_CLK_DISP_PIXEL, + imx8m_clk_composite("disp_pixel", imx8mn_disp_pixel_sels, base + 0xa500)); clk_dm(IMX8MN_CLK_I2C1, imx8m_clk_composite("i2c1", imx8mn_i2c1_sels, base + 0xad00)); clk_dm(IMX8MN_CLK_I2C2,
Add clocks support for the video subsystem. Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> --- drivers/clk/imx/clk-imx8mn.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+)