[3/5] mtd: spi-nor: ids: Add is25wp256 chip

Message ID 20190929074239.11575-4-jagan@amarulasolutions.com
State New
Headers show
Series
  • riscv: sifive/fu540: Enable SPI-NOR support
Related show

Commit Message

Jagan Teki Sept. 29, 2019, 7:42 a.m. UTC
Add is25wp256, chip to spi-nor id table.

Tested on Sifive fuse540 board.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 drivers/mtd/spi/spi-nor-ids.c | 2 ++
 1 file changed, 2 insertions(+)

Comments

Bin Meng Sept. 30, 2019, 10:05 a.m. UTC | #1
On Sun, Sep 29, 2019 at 3:43 PM Jagan Teki <jagan@amarulasolutions.com> wrote:
>
> Add is25wp256, chip to spi-nor id table.
>
> Tested on Sifive fuse540 board.

Should be: SiFive FU540

>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
>  drivers/mtd/spi/spi-nor-ids.c | 2 ++
>  1 file changed, 2 insertions(+)
>

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

Patch

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 6996c0a286..04db986561 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -128,6 +128,8 @@  const struct flash_info spi_nor_ids[] = {
 			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ INFO("is25wp128",  0x9d7018, 0, 64 * 1024, 256,
 			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{ INFO("is25wp256",  0x9d7019, 0, 64 * 1024, 512,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 #endif
 #ifdef CONFIG_SPI_FLASH_MACRONIX	/* MACRONIX */
 	/* Macronix */