[v3,1/5] clk: rk3399: Set empty for vopl assigned-clocks

Message ID 20200402114125.2501-2-jagan@amarulasolutions.com
State New
Headers show
Series
  • rockchip: rk3399: Fix HDMI out
Related show

Commit Message

Jagan Teki April 2, 2020, 11:41 a.m. UTC
During vidconsole probe, the device probe will try to
check whether the assigned clocks on that video console
node is initialized or not? and return an error if not.

But, unlike Linux U-Boot won't require to handle these
vopl assigned-clocks since core clocks are enough to
handle the video out to process.

So, mark them as empty in set_rate to satisfy clk_set_defaults
so-that probe happened properly.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
Changes for v3:
- new patch

 drivers/clk/rockchip/clk_rk3399.c | 7 +++++++
 1 file changed, 7 insertions(+)

Comments

Kever Yang April 2, 2020, 12:47 p.m. UTC | #1
On 2020/4/2 下午7:41, Jagan Teki wrote:
> During vidconsole probe, the device probe will try to
> check whether the assigned clocks on that video console
> node is initialized or not? and return an error if not.
>
> But, unlike Linux U-Boot won't require to handle these
> vopl assigned-clocks since core clocks are enough to
> handle the video out to process.
>
> So, mark them as empty in set_rate to satisfy clk_set_defaults
> so-that probe happened properly.
>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>



Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

Thanks,
- Kever
> ---
> Changes for v3:
> - new patch
>
>   drivers/clk/rockchip/clk_rk3399.c | 7 +++++++
>   1 file changed, 7 insertions(+)
>
> diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
> index 865b80cc0f..1f62376595 100644
> --- a/drivers/clk/rockchip/clk_rk3399.c
> +++ b/drivers/clk/rockchip/clk_rk3399.c
> @@ -994,6 +994,13 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
>   	case DCLK_VOP1:
>   		ret = rk3399_vop_set_clk(priv->cru, clk->id, rate);
>   		break;
> +	case ACLK_VOP1:
> +	case HCLK_VOP1:
> +		/**
> +		 * assigned-clocks handling won't require for vopl, so
> +		 * return 0 to satisfy clk_set_defaults during device probe.
> +		 */
> +		return 0;
>   	case SCLK_DDRCLK:
>   		ret = rk3399_ddr_set_clk(priv->cru, rate);
>   		break;

Patch

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index 865b80cc0f..1f62376595 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -994,6 +994,13 @@  static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
 	case DCLK_VOP1:
 		ret = rk3399_vop_set_clk(priv->cru, clk->id, rate);
 		break;
+	case ACLK_VOP1:
+	case HCLK_VOP1:
+		/**
+		 * assigned-clocks handling won't require for vopl, so
+		 * return 0 to satisfy clk_set_defaults during device probe.
+		 */
+		return 0;
 	case SCLK_DDRCLK:
 		ret = rk3399_ddr_set_clk(priv->cru, rate);
 		break;