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[209.85.220.65]) by mx.google.com with SMTPS id l5sor1548360pgr.5.2020.05.06.00.50.44 for (Google Transport Security); Wed, 06 May 2020 00:50:44 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a65:4c41:: with SMTP id l1mr6008887pgr.43.1588751443810; Wed, 06 May 2020 00:50:43 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:c598:8eeb:af7:7f36]) by smtp.gmail.com with ESMTPSA id y186sm1011133pfy.66.2020.05.06.00.50.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 May 2020 00:50:43 -0700 (PDT) From: Jagan Teki To: kever.yang@rock-chips.com, philipp.tomsich@theobroma-systems.com, Simon Glass , Frank Wang , wmc@rock-chips.com, chenjh@rock-chips.com, heiko@sntech.de Cc: u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, Belisko Marek , linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH v2 0/7] rockchip: PHY drivers (USB) Date: Wed, 6 May 2020 13:20:18 +0530 Message-Id: <20200506075025.1677-1-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.17.1 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=heoIEtYi; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This is next following series from previous PHY drivers on rockchip [1]. And also tested on top of Frank 'USB 3.0' series [2] from patches 0/9 to 6/9. With this USB 3.0 Host port seems to detecting USB storage but need more testing on other modes as well. Log on rock960 and NanoPC-t4: rock960 => usb start starting USB... Bus usb@fe380000: USB EHCI 1.00 Bus usb@fe3c0000: USB EHCI 1.00 Bus dwc3: usb maximum-speed not found Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 scanning bus usb@fe380000 for devices... 1 USB Device(s) found scanning bus usb@fe3c0000 for devices... 1 USB Device(s) found scanning bus dwc3 for devices... 2 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found rock960 => usb tree USB device tree: 1 Hub (480 Mb/s, 0mA) u-boot EHCI Host Controller 1 Hub (480 Mb/s, 0mA) u-boot EHCI Host Controller 1 Hub (5 Gb/s, 0mA) | U-Boot XHCI Host Controller | +-2 Mass Storage (480 Mb/s, 200mA) Generic Mass Storage 789CDB36 => usb start starting USB... Bus usb@fe380000: USB EHCI 1.00 Bus usb@fe3c0000: USB EHCI 1.00 Bus dwc3: usb maximum-speed not found dwc3_of_parse: In Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 Bus dwc3: usb maximum-speed not found dwc3_of_parse: In Register 2000140 NbrPorts 2 Starting the controller USB XHCI 1.10 scanning bus usb@fe380000 for devices... 1 USB Device(s) found scanning bus usb@fe3c0000 for devices... 1 USB Device(s) found scanning bus dwc3 for devices... 1 USB Device(s) found scanning bus dwc3 for devices... 2 USB Device(s) found scanning usb for storage devices... 1 Storage Device(s) found => usb tree USB device tree: 1 Hub (480 Mb/s, 0mA) u-boot EHCI Host Controller 1 Hub (480 Mb/s, 0mA) u-boot EHCI Host Controller 1 Hub (5 Gb/s, 0mA) U-Boot XHCI Host Controller 1 Hub (5 Gb/s, 0mA) | U-Boot XHCI Host Controller | +-2 Mass Storage (480 Mb/s, 200mA) Generic Mass Storage 789CDB36 [2] https://patchwork.ozlabs.org/project/uboot/cover/20200430021620.25772-1-frank.wang@rock-chips.com/ [1] https://patchwork.ozlabs.org/project/uboot/cover/20200430214529.18887-1-jagan@amarulasolutions.com/ Any inputs? Jagan. Jagan Teki (7): clk: rk3399: Enable/Disable the USB2PHY clk clk: rk3399: Set empty for TCPHY assigned-clocks clk: rk3399: Enable/Disable TCPHY clocks phy: rockchip: Add Rockchip USB2PHY driver arm64: dts: rk3399: Move u2phy into root port phy: rockchip: Add Rockchip USB TypeC PHY driver usb: dwc3: add dis_del_phy_power_chg_quirk arch/arm/dts/rk3399.dtsi | 108 +-- drivers/Makefile | 1 + drivers/clk/rockchip/clk_rk3399.c | 38 + drivers/phy/Kconfig | 1 + drivers/phy/rockchip/Kconfig | 21 + drivers/phy/rockchip/Makefile | 7 + drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 312 +++++++ drivers/phy/rockchip/phy-rockchip-typec.c | 796 ++++++++++++++++++ drivers/usb/dwc3/core.c | 6 + drivers/usb/dwc3/core.h | 1 + include/dwc3-uboot.h | 1 + 11 files changed, 1238 insertions(+), 54 deletions(-) create mode 100644 drivers/phy/rockchip/Kconfig create mode 100644 drivers/phy/rockchip/Makefile create mode 100644 drivers/phy/rockchip/phy-rockchip-inno-usb2.c create mode 100644 drivers/phy/rockchip/phy-rockchip-typec.c