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[209.85.220.65]) by mx.google.com with SMTPS id v7sor6874051pgi.78.2020.05.09.09.56.37 for (Google Transport Security); Sat, 09 May 2020 09:56:37 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a63:6602:: with SMTP id a2mr7330321pgc.281.1589043397338; Sat, 09 May 2020 09:56:37 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:21f6:1c8f:ae94:fb04]) by smtp.gmail.com with ESMTPSA id x195sm4977098pfc.0.2020.05.09.09.56.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 09 May 2020 09:56:36 -0700 (PDT) From: Jagan Teki To: Kever Yang , Simon Glass , Philipp Tomsich Cc: shawn.lin@rock-chips.com, patrick@blueri.se, sunil@amarulasolutions.com, u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH v3 0/6] rockchip: Add PCIe host support Date: Sat, 9 May 2020 22:26:18 +0530 Message-Id: <20200509165624.20791-1-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.17.1 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=GbzWLBCm; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This series support PCIe host controller support on rockchip rk3399 platform. It is based on previous version[1] changes. Works well on rk3399 boards like rock960, nanopc-t4 and roc-kr3399-pc-mezzanine board as Gen1 configurable host with M.2 SSD. Changes for v3: - fix few clock register values - collect mani a-b Changes for v2: - handle USB, GMAC clocks - collect kever r-o-b tag - simplify rd and wr conf API [1] https://patchwork.ozlabs.org/project/uboot/cover/20200430070412.12499-1-jagan@amarulasolutions.com/ Any inputs? Jagan. Jagan Teki (6): clk: rk3399: Add enable/disable clks clk: rk3399: Enable/Disable the PCIEPHY clk pci: Add Rockchip PCIe controller driver pci: Add Rockchip PCIe PHY controller driver rockchip: Enable PCIe/M.2 on rk3399 board w/ M.2 rockchip: Enable PCIe/M.2 on rock960 board arch/arm/dts/rk3399-u-boot.dtsi | 1 + board/vamrs/rock960_rk3399/rock960-rk3399.c | 23 + configs/nanopc-t4-rk3399_defconfig | 4 + configs/roc-pc-mezzanine-rk3399_defconfig | 4 + configs/rock960-rk3399_defconfig | 5 + drivers/clk/rockchip/clk_rk3399.c | 154 ++++++ drivers/pci/Kconfig | 8 + drivers/pci/Makefile | 1 + drivers/pci/pcie_rockchip.c | 491 ++++++++++++++++++++ drivers/pci/pcie_rockchip.h | 142 ++++++ drivers/pci/pcie_rockchip_phy.c | 205 ++++++++ 11 files changed, 1038 insertions(+) create mode 100644 drivers/pci/pcie_rockchip.c create mode 100644 drivers/pci/pcie_rockchip.h create mode 100644 drivers/pci/pcie_rockchip_phy.c