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[209.85.220.41]) by mx.google.com with SMTPS id u19sor6759431pfk.50.2021.02.28.07.52.41 for (Google Transport Security); Sun, 28 Feb 2021 07:52:41 -0800 (PST) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a05:6a00:1a08:b029:1cd:404e:a70c with SMTP id g8-20020a056a001a08b02901cd404ea70cmr11401319pfv.33.1614527561005; Sun, 28 Feb 2021 07:52:41 -0800 (PST) Received: from ub-XPS-13-9350.domain.name ([103.161.30.225]) by smtp.gmail.com with ESMTPSA id o18sm14725779pjq.44.2021.02.28.07.52.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 28 Feb 2021 07:52:40 -0800 (PST) From: Jagan Teki To: Patrick Delaunay , Patrice Chotard , Matteo Lisi Cc: uboot-stm32@st-md-mailman.stormreply.com, u-boot@lists.denx.de, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH 0/9] stm32: Add Engicam STM32MP1 SoM Date: Sun, 28 Feb 2021 21:22:17 +0530 Message-Id: <20210228155226.77904-1-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b="o/ZazXC0"; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Patch series for Engicam i.Core and MicroGEA SoM and it's associated carrier board dts(i) support. patch 1: for i.Core STM32MP1 SoM dtsi patch 2: i.Core DDR3 config patch 3: for SPL_SPI_LOAD build fix patch 4 - 5: i.Core STM32MP1 with EDIMM2.2 and C.Touch 2.0 carriers. patch 6: for MicroGEA STM32MP1 Micro SoM dtsi patch 7: MicroGEA DDR3 config patch 8 - 9: MicroGEA STM32MP1 with MicroDev 2.0 and 7" OF carriers. Note: dts(i) patches are Linux Mailing list. Any inputs? Jagan. Jagan Teki (9): ARM: dts: stm32: Add Engicam i.Core STM32MP1 SoM ARM: dts: stm32: Add Engicam i.Core STM32MP1 1X4Gb DDR3 ARM: stm32: Imply SPL_SPI_LOAD board: stm32: Add Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit board: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0 ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 Micro SoM ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 1X4Gb DDR3 board: stm32: Add Engicam MicroGEA STM32MP1 MicroDev 2.0 board board: stm32: Add Engicam MicroGEA STM32MP1 MicroDev 2.0 7" OF arch/arm/dts/Makefile | 4 + .../stm32mp15-ddr3-icore-1x4Gb-1066-binG.dtsi | 119 +++++++++++ ...m32mp15-ddr3-microgea-1x4Gb-1066-binG.dtsi | 121 +++++++++++ ...2mp157a-icore-stm32mp1-ctouch2-u-boot.dtsi | 51 +++++ .../stm32mp157a-icore-stm32mp1-ctouch2.dts | 47 +++++ ...mp157a-icore-stm32mp1-edimm2.2-u-boot.dtsi | 51 +++++ .../stm32mp157a-icore-stm32mp1-edimm2.2.dts | 47 +++++ .../stm32mp157a-icore-stm32mp1-u-boot.dtsi | 146 +++++++++++++ arch/arm/dts/stm32mp157a-icore-stm32mp1.dtsi | 196 ++++++++++++++++++ ...rogea-stm32mp1-microdev2.0-of7-u-boot.dtsi | 51 +++++ ...157a-microgea-stm32mp1-microdev2.0-of7.dts | 154 ++++++++++++++ ...-microgea-stm32mp1-microdev2.0-u-boot.dtsi | 51 +++++ ...32mp157a-microgea-stm32mp1-microdev2.0.dts | 55 +++++ .../stm32mp157a-microgea-stm32mp1-u-boot.dtsi | 118 +++++++++++ .../dts/stm32mp157a-microgea-stm32mp1.dtsi | 148 +++++++++++++ arch/arm/mach-stm32mp/Kconfig | 54 ++++- board/engicam/stm32mp1/Kconfig | 12 ++ board/engicam/stm32mp1/MAINTAINERS | 24 +++ board/engicam/stm32mp1/Makefile | 10 + board/engicam/stm32mp1/spl.c | 48 +++++ board/engicam/stm32mp1/stm32mp1.c | 131 ++++++++++++ ...stm32mp15-icore-stm32mp1-ctouch2_defconfig | 80 +++++++ ...tm32mp15-icore-stm32mp1-edimm2.2_defconfig | 80 +++++++ ...-microgea-stm32mp1-microdev2-of7_defconfig | 80 +++++++ ...mp15-microgea-stm32mp1-microdev2_defconfig | 80 +++++++ 25 files changed, 1957 insertions(+), 1 deletion(-) create mode 100644 arch/arm/dts/stm32mp15-ddr3-icore-1x4Gb-1066-binG.dtsi create mode 100644 arch/arm/dts/stm32mp15-ddr3-microgea-1x4Gb-1066-binG.dtsi create mode 100644 arch/arm/dts/stm32mp157a-icore-stm32mp1-ctouch2-u-boot.dtsi create mode 100644 arch/arm/dts/stm32mp157a-icore-stm32mp1-ctouch2.dts create mode 100644 arch/arm/dts/stm32mp157a-icore-stm32mp1-edimm2.2-u-boot.dtsi create mode 100644 arch/arm/dts/stm32mp157a-icore-stm32mp1-edimm2.2.dts create mode 100644 arch/arm/dts/stm32mp157a-icore-stm32mp1-u-boot.dtsi create mode 100644 arch/arm/dts/stm32mp157a-icore-stm32mp1.dtsi create mode 100644 arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7-u-boot.dtsi create mode 100644 arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dts create mode 100644 arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0-u-boot.dtsi create mode 100644 arch/arm/dts/stm32mp157a-microgea-stm32mp1-microdev2.0.dts create mode 100644 arch/arm/dts/stm32mp157a-microgea-stm32mp1-u-boot.dtsi create mode 100644 arch/arm/dts/stm32mp157a-microgea-stm32mp1.dtsi create mode 100644 board/engicam/stm32mp1/Kconfig create mode 100644 board/engicam/stm32mp1/MAINTAINERS create mode 100644 board/engicam/stm32mp1/Makefile create mode 100644 board/engicam/stm32mp1/spl.c create mode 100644 board/engicam/stm32mp1/stm32mp1.c create mode 100644 configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig create mode 100644 configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig create mode 100644 configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig create mode 100644 configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig