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[209.85.220.65]) by mx.google.com with SMTPS id w16sor14443408plp.55.2019.04.02.04.29.03 for (Google Transport Security); Tue, 02 Apr 2019 04:29:03 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:902:586:: with SMTP id f6mr68556287plf.68.1554204543467; Tue, 02 Apr 2019 04:29:03 -0700 (PDT) Received: from jagan-XPS-13-9350.imgcgcw.net ([147.50.13.10]) by smtp.gmail.com with ESMTPSA id u62sm23992715pfa.124.2019.04.02.04.28.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 02 Apr 2019 04:29:02 -0700 (PDT) From: Jagan Teki To: Simon Glass , Tom Rini , Neil Armstrong , Philipp Tomsich , Marek Vasut , Stefano Babic , Fabio Estevam , Peng Fan , Maxime Ripard , Michael Trimarchi , Andre Przywara Cc: u-boot@lists.denx.de, uboot-imx@nxp.com, Shyam Saini , linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH v2 00/10] clk: imx: Add i.MX6 CLK support Date: Tue, 2 Apr 2019 16:58:33 +0530 Message-Id: <20190402112843.992-1-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=h+r1VbK6; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This is revised version of previous i.MX6 clock management [1]. The main difference between previous version is - Group the i.MX6 ccm clocks into gates and tree instead of handling the clocks in simple way using case statement. - use gate clocks for enable/disable management. - use tree clocks for get/set rate or parent traverse management. - parent clock handling via clock type. - traverse the parent clock using recursive functionlaity. The main motive behind this tree framework is to make the clock tree management simple and useful for U-Boot requirements instead of garbing Linux clock management code. We are trying to manage the Allwinner clocks with similar kind, so having this would really help i.MX6 as well. Added simple names for clock macros, but will update it in future version. I have skipped ENET clocks from previous series, will add it in future patches. Changes for v2: - changed framework patches. - add support for imx6qdl and imx6ul boards - add clock gates, tree. [1] https://patchwork.ozlabs.org/cover/950964/ Any inputs? Jagan. Jagan Teki (10): clk: imx: Kconfig: Make CONFIG_CLK available for selection clk: imx: Add i.MX6Q clock driver clk: imx: Add i.MX6UL clock driver clk: Add clk_div_mask helper clk: imx: Add imx6q clock tree support clk: imx6: Add imx6ul clock tree support ARM: dts: i.MX6QDL: Add u-boot,dm-spl for clks ARM: dts: i.MX6UL: Add u-boot,dm-spl for clks configs: icore_mipi: Enable CLK ARM: imx6: Enable CLK for Engicam i.MX6UL boards arch/arm/dts/imx6qdl-u-boot.dtsi | 4 + arch/arm/dts/imx6ul-u-boot.dtsi | 4 + arch/arm/include/asm/arch-mx6/clock.h | 109 ++++++++++++++++ arch/arm/mach-imx/mx6/Kconfig | 2 + configs/imx6qdl_icore_mipi_defconfig | 2 + configs/imx8qxp_mek_defconfig | 2 +- drivers/clk/imx/Kconfig | 29 ++++- drivers/clk/imx/Makefile | 6 + drivers/clk/imx/clk-imx6-common.c | 172 ++++++++++++++++++++++++++ drivers/clk/imx/clk-imx6q.c | 109 ++++++++++++++++ drivers/clk/imx/clk-imx6ul.c | 85 +++++++++++++ include/clk-uclass.h | 2 + 12 files changed, 523 insertions(+), 3 deletions(-) create mode 100644 drivers/clk/imx/clk-imx6-common.c create mode 100644 drivers/clk/imx/clk-imx6q.c create mode 100644 drivers/clk/imx/clk-imx6ul.c