From patchwork Sun Sep 25 17:52:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 2379 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-ed1-f71.google.com (mail-ed1-f71.google.com [209.85.208.71]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 403863F265 for ; Sun, 25 Sep 2022 19:52:18 +0200 (CEST) Received: by mail-ed1-f71.google.com with SMTP id v11-20020a056402348b00b004516e0b7eedsf3722818edc.8 for ; Sun, 25 Sep 2022 10:52:18 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1664128338; cv=pass; d=google.com; s=arc-20160816; b=Ch4MN784lU1KHEIERpGhFGRrqx13WclaM61qAq2ueTi5N8QmhyaYu5w14gzlR4hDxw BfqHtVM223SW7eMhmn6fsbwnMKsLTtdcLfuroNyC0/DwLsOyOJTY2vABp7h4GbbNOYX/ 3rrO8djne5G+xLBZaOfc5LlXvQuEY3WZI+5etyzMX2m1/cTdqe7QAXfIHbuo+uhhNBv+ bpQN1I/luEPb4gU8BpyaxCk8k4Ajz1yovzuyyEfgA5kFZywjiLU6y5zP4j34cCspZ2Hk qELRZT4xveneSt4dcR1SlTyTE7UOfYCgL4Ld+ZWpMyjGfCxG7WVWt8QsXLAxW23Uq4/y UMTQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:mime-version:message-id:date:subject:cc:to :from:dkim-signature; bh=DOQ9RGm/Z4t0FJNhLN49Z+XowpE5tgaH2vFE2UasXCc=; b=piUXKI8c3n4X1CNOxb1Ozb6AXXooKR5zU/8GBZ9gmydgn3cwV8iT2wgQlP9GwaEoVL uqU+EFT5xbU7guOzLOs5mAyg/SnC+xlwSiPsQodp9VcKDdNZ82JvNAdfENIjytvjuxwP AjJ9r4ckSeQhfgV9FI3m0veHHvPHmuZm98EEm3mW0UWSbXyxVhBzREe0MUbvIu7qrNxc HhGycMRp3dIGNt6YIX7eqv3+EOXCDd8MDzaI0zPkpu+57ZGY002fJBscrqvh2d0EtEkx c1hsk4TX1WpYULVvEI8RGIGlAhZ3RAbM/T6RQU+8eFv6rlKJzzyhC44tiSpdGjr+xwFW L0OQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=Pmmlj3lT; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:x-original-authentication-results :x-original-sender:mime-version:message-id:date:subject:cc:to:from :from:to:cc:subject:date; bh=DOQ9RGm/Z4t0FJNhLN49Z+XowpE5tgaH2vFE2UasXCc=; b=Y2fheQI+tUZw2xFDhbdOHsJOfcfMSHEDKsz3sTbvy+xoMsJYlUVobOGLNxttA++7pf Ibp6MEE166w/iquW9uelumc6GjV32bG9DPM7+NnKVLxnnVou4JL8Yq5uvHw/b85A66LH 8dCJY+k87kjR7PD0GVZgcv9vPof2h8TYYg9iw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=list-unsubscribe:list-archive:list-help:list-post :x-spam-checked-in-group:list-id:mailing-list:precedence :x-original-authentication-results:x-original-sender:mime-version :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=DOQ9RGm/Z4t0FJNhLN49Z+XowpE5tgaH2vFE2UasXCc=; b=TafEIQ7IDcustEauFNwhikn0qiAcv7dUZZlzR1rd1fqJFR9XOGpFJX40oqXsI69E24 6Rc7PtZ+dUjIFKAXkY9HXJtx9xb6NOuCSymye5TVc5x8TtNPLXnPjtdDC0krWfkx9pW6 ypIYgD6EAZpziWzzRpuon5TWgJN1SpQ4iIRm0arAgXraFP36ysimNPt963jRv43vhfkZ UcFzKrz6YDXFEkU5GmbCHjmgHyNKO2b0dzWxVIJkGz3uxQKzT2BawOf0gFPoi6gc+gRe gQp5GdLkwXhODNqPgWx0F3FnWdOnYlYvQwICkVflCZuVBlzr66w6dTdZuXO1aO0iVPPp b5gA== X-Gm-Message-State: ACrzQf32jGNqoP60PRbMsRstu9mUorSFafomFdmb4SejBfxvYXBzg0wZ nOuwUirubRPQQ+kBX/UzCdpmcwJo X-Google-Smtp-Source: AMsMyM4hpdZKqIy1W3uCcW9giKL3I+k5lZG81os1DNsAd3dvhjdf1zAYAMYMzDTCyx9JsP+9bsasJQ== X-Received: by 2002:a17:906:8a4a:b0:781:70ab:e7cb with SMTP id gx10-20020a1709068a4a00b0078170abe7cbmr14732811ejc.492.1664128337788; Sun, 25 Sep 2022 10:52:17 -0700 (PDT) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a05:6402:34cc:b0:44e:93b9:21c8 with SMTP id w12-20020a05640234cc00b0044e93b921c8ls11797423edc.1.-pod-prod-gmail; Sun, 25 Sep 2022 10:52:16 -0700 (PDT) X-Received: by 2002:a05:6402:280a:b0:451:5aad:8968 with SMTP id h10-20020a056402280a00b004515aad8968mr19029222ede.55.1664128336548; Sun, 25 Sep 2022 10:52:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1664128336; cv=none; d=google.com; s=arc-20160816; b=cP2W0auq7KBx+iub6JBQpMH77XUGXf5rv6u1uPnuDG6i+nSSockBf0Mx6sPJeg3SFp MmdjgqZ01TiNVp+IW65GHi4jG9Cf6vqha+pn2FNyIR8hRSWpwHW0iopgPNH+lQ1QSpky 0JAUs9Zc14UUVQkCZrCiJbZI7Qem+72Ta1wOoKze7PaNxR6zhIs/sPQWEgjXR5+in6IK 6YCkipnDPAyrRBtRqwe2930CZ+Eu7f8fDS3z3qfm5M85NqT5lpBQMx9ECn4i0KoV2YuY BIoE73WSjfZf3sDhPs67IDCkBWB0sp/INMS6iNj4HAgZ1/PKqCrww3hfiNszXbQArSUh sCZQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:dkim-signature; bh=tKIChjssk9qrfQZXpSX5zD6aIatsPePkOhcMo1qow4g=; b=AtdW47MskxCo8nYMZt9cwCgQwilHXfDa4ntVDZk6J+JN1mgF09hVWAShM1ZA3mzvCP IKP4jCIhWD+yuW6NyHpuQ1ZTI9gggYD93TabCbswBTgmbD7IOUbElB3zrhII7kZOlQL9 np/orjnvQieIVcMeDTT6ZPgZXjrRccwbwSA+EM06bU7bdsvQ7Rhmlv5kQp4o3ZIe6ZNK q39pE8eA1t8qrnEd3boz+66F9v1ng83QcOcIbvf8a1B4VfTL7KEJWP+TUwGT4y5UUD17 m8ob30FTWjpsggvKXpUkMIQKVPQcWFCP9uTg349aj0fidbjIJd+85qKWptbuyHbHW5Bs O0nQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=Pmmlj3lT; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Received: from mail-sor-f41.google.com (mail-sor-f41.google.com. [209.85.220.41]) by mx.google.com with SMTPS id m5-20020a50cc05000000b00456f0afc179sor1636090edi.45.2022.09.25.10.52.16 for (Google Transport Security); Sun, 25 Sep 2022 10:52:16 -0700 (PDT) Received-SPF: pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a05:6402:2802:b0:43a:9098:55a0 with SMTP id h2-20020a056402280200b0043a909855a0mr18339228ede.179.1664128336243; Sun, 25 Sep 2022 10:52:16 -0700 (PDT) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-95-232-92-192.retail.telecomitalia.it. [95.232.92.192]) by smtp.gmail.com with ESMTPSA id f23-20020a056402161700b0045703d699b9sm3252594edv.78.2022.09.25.10.52.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 25 Sep 2022 10:52:15 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Rob Herring , Krzysztof Kozlowski , Marc Kleine-Budde , Vincent Mailhol , michael@amarulasolutions.com, Amarula patchwork , Alexandre Torgue , Dario Binacchi , Christophe Roullier , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Krzysztof Kozlowski , Lee Jones , Mathieu Poirier , Maxime Coquelin , Paolo Abeni , Patrice Chotard , Rob Herring , Wolfgang Grandegger , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-can@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, netdev@vger.kernel.org Subject: [RFC PATCH v4 0/5] can: bxcan: add support for ST bxCAN controller Date: Sun, 25 Sep 2022 19:52:04 +0200 Message-Id: <20220925175209.1528960-1-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=Pmmlj3lT; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The series adds support for the basic extended CAN controller (bxCAN) found in many low- to middle-end STM32 SoCs. The driver design (one core module and one driver module) was inspired by other ST drivers (e. g. drivers/iio/adc/stm32-adc.c, drivers/iio/adc/stm32-adc-core.c) where device instances share resources. The shared resources functions are implemented in the core module, the device driver in a separate module. The driver has been tested on the stm32f469i-discovery board with a kernel version 5.19.0-rc2 in loopback + silent mode: ip link set can0 type can bitrate 125000 loopback on listen-only on ip link set up can0 candump can0 -L & cansend can0 300#AC.AB.AD.AE.75.49.AD.D1 For uboot and kernel compilation, as well as for rootfs creation I used buildroot: make stm32f469_disco_sd_defconfig make but I had to patch can-utils and busybox as can-utils and iproute are not compiled for MMU-less microcotrollers. In the case of can-utils, replacing the calls to fork() with vfork(), I was able to compile the package with working candump and cansend applications, while in the case of iproute, I ran into more than one problem and finally I decided to extend busybox's ip link command for CAN-type devices. I'm still wondering if it was really necessary, but this way I was able to test the driver. Changes in v4: - Remove "st,stm32f4-bxcan-core" compatible. In this way the can nodes (compatible "st,stm32f4-bxcan") are no longer children of a parent node with compatible "st,stm32f4-bxcan-core". - Add the "st,gcan" property (global can memory) to can nodes which references a "syscon" node containing the shared clock and memory addresses. - Replace the node can@40006400 (compatible "st,stm32f4-bxcan-core") with the gcan@40006600 node ("sysnode" compatible). The gcan node contains clocks and memory addresses shared by the two can nodes of which it's no longer the parent. - Add to can nodes the "st,gcan" property (global can memory) which references the gcan@40006600 node ("sysnode compatibble). - Add "dt-bindings: arm: stm32: add compatible for syscon gcan node" patch. - Drop the core driver. Thus bxcan-drv.c has been renamed to bxcan.c and moved to the drivers/net/can folder. The drivers/net/can/bxcan directory has therefore been removed. - Use the regmap_*() functions to access the shared memory registers. - Use spinlock to protect bxcan_rmw(). - Use 1 space, instead of tabs, in the macros definition. - Drop clock ref-counting. - Drop unused code. - Drop the _SHIFT macros and use FIELD_GET()/FIELD_PREP() directly. - Add BXCAN_ prefix to lec error codes. - Add the macro BXCAN_RX_MB_NUM. - Enable time triggered mode and use can_rx_offload(). - Use readx_poll_timeout() in function with timeouts. - Loop from tail to head in bxcan_tx_isr(). - Check bits of tsr register instead of pkts variable in bxcan_tx_isr(). - Don't return from bxcan_handle_state_change() if skb/cf are NULL. - Enable/disable the generation of the bus error interrupt depending on can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING. - Don't return from bxcan_handle_bus_err() if skb is NULL. - Drop statistics updating from bxcan_handle_bus_err(). - Add an empty line in front of 'return IRQ_HANDLED;' - Rename bxcan_start() to bxcan_chip_start(). - Rename bxcan_stop() to bxcan_chip_stop(). - Disable all IRQs in bxcan_chip_stop(). - Rename bxcan_close() to bxcan_ndo_stop(). - Use writel instead of bxcan_rmw() to update the dlc register. Changes in v3: - Remove 'Dario Binacchi ' SOB. - Add description to the parent of the two child nodes. - Move "patterProperties:" after "properties: in top level before "required". - Add "clocks" to the "required:" list of the child nodes. - Remove 'Dario Binacchi ' SOB. - Add "clocks" to can@0 node. - Remove 'Dario Binacchi ' SOB. - Remove a blank line. - Remove 'Dario Binacchi ' SOB. - Fix the documentation file path in the MAINTAINERS entry. - Do not increment the "stats->rx_bytes" if the frame is remote. - Remove pr_debug() call from bxcan_rmw(). Changes in v2: - Change the file name into 'st,stm32-bxcan-core.yaml'. - Rename compatibles: - st,stm32-bxcan-core -> st,stm32f4-bxcan-core - st,stm32-bxcan -> st,stm32f4-bxcan - Rename master property to st,can-master. - Remove the status property from the example. - Put the node child properties as required. - Remove a blank line. - Fix sparse errors. - Create a MAINTAINERS entry. - Remove the print of the registers address. - Remove the volatile keyword from bxcan_rmw(). - Use tx ring algorithm to manage tx mailboxes. - Use can_{get|put}_echo_skb(). - Update DT properties. Dario Binacchi (5): dt-bindings: arm: stm32: add compatible for syscon gcan node dt-bindings: net: can: add STM32 bxcan DT bindings ARM: dts: stm32: add CAN support on stm32f429 ARM: dts: stm32: add pin map for CAN controller on stm32f4 can: bxcan: add support for ST bxCAN controller .../bindings/arm/stm32/st,stm32-syscon.yaml | 2 + .../bindings/net/can/st,stm32-bxcan.yaml | 83 ++ MAINTAINERS | 7 + arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 30 + arch/arm/boot/dts/stm32f429.dtsi | 29 + drivers/net/can/Kconfig | 12 + drivers/net/can/Makefile | 1 + drivers/net/can/bxcan.c | 1110 +++++++++++++++++ 8 files changed, 1274 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml create mode 100644 drivers/net/can/bxcan.c