From patchwork Tue Feb 7 11:29:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 2698 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-wm1-f72.google.com (mail-wm1-f72.google.com [209.85.128.72]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 0618840CCE for ; Tue, 7 Feb 2023 12:29:56 +0100 (CET) Received: by mail-wm1-f72.google.com with SMTP id fl9-20020a05600c0b8900b003dfe4bae099sf6768465wmb.0 for ; Tue, 07 Feb 2023 03:29:55 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1675769395; cv=pass; d=google.com; s=arc-20160816; b=NkPFmTm/Ypc++vYrlX25yQLj7hzipZXPQOgoKfWEY0E7ejLSwc/U4Veb4TClENah2p iDk6PJdud/p84SGTNU6mdW0k3ZH3ozhZaETup7BTcQMwImtZwN93czHuoTGsygPh3OH6 VqUrmVd7c9mAOmju7NSvFfHRz3hNM1Gem3iIkFVOpLMTg0Cx3q9TgnG8Q8lmlu7IGj9B muhJmNGM3rB8L1klS9+YuPzCADddY56JYlIC2lWDO8rtHObCayT0Rl135l9Wz0ZOdYob JVKYIgg9A9HZjvjOIDDXoeYFY7+XvlS/YRyCUQHXle+XZ/BTEERzxB+/5yQEyl7dOkrT a+ew== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:mime-version:message-id:date:subject:cc:to :from:dkim-signature; bh=7g3fhpSvzMpbGbm1YBpq1qtmT41ncRGKBEpmv2LEGp4=; b=ZKUE2Q5JnzGZVA+DJn0x+wSpXEXEQ+FeM4QnWGjyploh1V/EpsJwZzCV9qSTlafDci 2AwpM60LGjyxL175SUKHsakprh9ujvuVNNQAPsqQpZ/0Y/y5MwJJtDcOmQRqLaE+0Lv2 JETGbyKIte+bn2s0ceV6JeSx0eUzG9bxPDkcE8Cj8yElD788oleJCD5vHja4Y22zWB9N 8fRMRhud7hs7nxsyykxpE8oRGm72bXOqc2pERcIAb2AOEKh55Zhs2Co94FEC1V+HrVTX BtJHPb+chd/PSaLDL/xIwHb9qHZph+2abgNPzrjXnHYn0G8mS9X+C096UFOwjjHDFp90 kEeg== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=kkrXu372; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:x-original-authentication-results :x-original-sender:mime-version:message-id:date:subject:cc:to:from :from:to:cc:subject:date:message-id:reply-to; bh=7g3fhpSvzMpbGbm1YBpq1qtmT41ncRGKBEpmv2LEGp4=; b=ReTOA3cy26ErhtoIxB5OQ/phyHbCQy1UuOzpqaSSHdWH3eOphTPF55SIA+j6XlIs/y j7sdaV9fUzqemq9R+3bMW1Y2Zf5EzajJndYEnrcEBLwoQIvp2oubk5Q7pWij9SltCO5r iF8q0+m1QTk+A4ccJx+oQQFotyofX4laQ4ExY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=list-unsubscribe:list-archive:list-help:list-post :x-spam-checked-in-group:list-id:mailing-list:precedence :x-original-authentication-results:x-original-sender:mime-version :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7g3fhpSvzMpbGbm1YBpq1qtmT41ncRGKBEpmv2LEGp4=; b=vQlD+FrfpEhksuNeynvaW7ChzxYcJhacsCyy2lzuG3YFeQzBI7wQLmiWPeFPRhYVQx IfSUL4oxoelY8Hj1D85whFnY0yuoZrbTap9tqZHl5miAQSIgmFP1yaznAG3241ywg1O8 LO/uxVf/NOqtMwDxX2n5/A3Y81QrpcCwW1SFQdv0NakvlKmUn3MFM6ub9Q+gnFs2g4bU DqquShCe8IbjtW7tZ2grhYiluXQ1cQYFnRdCrVUGw62AuKfubJn29qHwIa0FtyfDIuvt TlcMj4JKOpswUj7urmFRkJnzHnwsIW011BobCPMKHHXq8sToE3NualLDqgd6rhpdoHBN kGVw== X-Gm-Message-State: AO0yUKXsEH+z/GTi5flzI8QYMS8aPInh5sUKKO8I0WG8GYZ+vSutdrt+ TkfFEL2fEjN22NY0J50HYOhez+1jB6YThg== X-Google-Smtp-Source: AK7set8Xh/Kg4P9pvCJ3d61np1yA+WRjIL4NXcrGjcEwXfu88ju3KIRJurR+1bs9yMRPdI6d3tDXfQ== X-Received: by 2002:a1c:f211:0:b0:3da:fac4:7dc4 with SMTP id s17-20020a1cf211000000b003dafac47dc4mr1662380wmc.38.1675769395587; Tue, 07 Feb 2023 03:29:55 -0800 (PST) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a05:600c:3ba7:b0:3d9:de91:ba54 with SMTP id n39-20020a05600c3ba700b003d9de91ba54ls197590wms.0.-pod-preprod-gmail; Tue, 07 Feb 2023 03:29:54 -0800 (PST) X-Received: by 2002:a05:600c:1da8:b0:3df:9858:c037 with SMTP id p40-20020a05600c1da800b003df9858c037mr13497487wms.12.1675769394096; Tue, 07 Feb 2023 03:29:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1675769394; cv=none; d=google.com; s=arc-20160816; b=YKhe28/sSRP3ArS7gwjGvlHkhBvOUTSCq/aDwN9KVcBrfpV5CB4Sh8OrloAyNJC+8O icV1w4JC8VM0r3iJYyiJVi4asJgDt3D2Vy5pYBQec+RiJRa8H71o0d1Y3jSLjZOjwrUv eJIWxo2o5188+hGjn39p0fz8YbNGECL0SXYcJLbIAP0744T070P9WTQR2/I0uhj4jt17 nW4PXVVi4yW2s5b/3l9QiTcnq1p+Yz5M+Lfkoh+H9uZEPupuMw7hJZj/4xCJevY74RX9 eFHDUdJxvsD/YSpgGZgGkLGl8OHNgar2zqbJjtbDwvXwJuP6/8nEAgIi6cUgEB0b1UtW URNQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:dkim-signature; bh=nmKHBHnPdxu/HZFwVcQ6tfAQn/CQ7f4jjd7l14TU8o8=; b=knxCJwgEhesXloTfLuyF8+WU8ZnHjexqAbnqJAlxzax8oq9lq7JoYQ5m7qzEhUtyu5 J9nZmz339KSxXGREYmHPXA5W78YfqM3s7DXdbXeMzRSBp3w5OrX/D0icB+QQYoqrk75a jNJxp+MCuXOqUYm6OWp5j3V0KiilYqQ/peos8Y9Rx/yOdItEqMakbL+On4VMdazq4D1y 4j0YMsz6m6VpXQ3Cy2Zj9s0RxwWYgihPlN3OlbOEYpil/voHT5Wm+d+2j+soBgr7gLmH /r9omlmXfwlk5EdYUCOXgVWMQYFDbARCpGNOv5eP3ah3n0lMxxr07iJHZBSoQ2u/ocM6 r+kQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=kkrXu372; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Received: from mail-sor-f41.google.com (mail-sor-f41.google.com. [209.85.220.41]) by mx.google.com with SMTPS id c7-20020a7bc007000000b003dff71b3f96sor2722163wmb.9.2023.02.07.03.29.54 for (Google Transport Security); Tue, 07 Feb 2023 03:29:54 -0800 (PST) Received-SPF: pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a05:600c:3086:b0:3df:eeaa:816d with SMTP id g6-20020a05600c308600b003dfeeaa816dmr1687966wmn.28.1675769393808; Tue, 07 Feb 2023 03:29:53 -0800 (PST) Received: from dario-ThinkPad-T14s-Gen-2i.amarulasolutions.com (mob-5-90-193-20.net.vodafone.it. [5.90.193.20]) by smtp.gmail.com with ESMTPSA id bi5-20020a05600c3d8500b003db012d49b7sm2020827wmb.2.2023.02.07.03.29.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Feb 2023 03:29:53 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Marc Kleine-Budde , Alexandre Torgue , michael@amarulasolutions.com, Krzysztof Kozlowski , Vincent Mailhol , Rob Herring , Amarula patchwork , Dario Binacchi , Alexandre Belloni , Christophe Roullier , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Krzysztof Kozlowski , Mark Brown , Maxime Coquelin , Paolo Abeni , Rob Herring , Sebastian Reichel , Wolfgang Grandegger , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-can@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, netdev@vger.kernel.org Subject: [RESEND PATCH v7 0/5] can: bxcan: add support for ST bxCAN controller Date: Tue, 7 Feb 2023 12:29:21 +0100 Message-Id: <20230207112926.664773-1-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=kkrXu372; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The series adds support for the basic extended CAN controller (bxCAN) found in many low- to middle-end STM32 SoCs. The driver design (one core module and one driver module) was inspired by other ST drivers (e. g. drivers/iio/adc/stm32-adc.c, drivers/iio/adc/stm32-adc-core.c) where device instances share resources. The shared resources functions are implemented in the core module, the device driver in a separate module. The driver has been tested on the stm32f469i-discovery board with a kernel version 5.19.0-rc2 in loopback + silent mode: ip link set can0 type can bitrate 125000 loopback on listen-only on ip link set up can0 candump can0 -L & cansend can0 300#AC.AB.AD.AE.75.49.AD.D1 For uboot and kernel compilation, as well as for rootfs creation I used buildroot: make stm32f469_disco_sd_defconfig make but I had to patch can-utils and busybox as can-utils and iproute are not compiled for MMU-less microcotrollers. In the case of can-utils, replacing the calls to fork() with vfork(), I was able to compile the package with working candump and cansend applications, while in the case of iproute, I ran into more than one problem and finally I decided to extend busybox's ip link command for CAN-type devices. I'm still wondering if it was really necessary, but this way I was able to test the driver. Changes in v7: - Add Vincent Mailhol's Reviewed-by tag. - Remove all unused macros for reading/writing the controller registers. - Add CAN_ERR_CNT flag to notify availability of error counter. - Move the "break" before the newline in the switch/case statements. - Print the mnemotechnic instead of the error value in each netdev_err(). - Remove the debug print for timings parameter. - Do not copy the data if CAN_RTR_FLAG is set in bxcan_start_xmit(). - Populate ndev->ethtool_ops with the default timestamp info. Changes in v6: - move can1 node before gcan to keep ordering by address. Changes in v5: - Add Rob Herring's Acked-by tag. - Add Rob Herring's Reviewed-by tag. - Put static in front of bxcan_enable_filters() definition. Changes in v4: - Remove "st,stm32f4-bxcan-core" compatible. In this way the can nodes (compatible "st,stm32f4-bxcan") are no longer children of a parent node with compatible "st,stm32f4-bxcan-core". - Add the "st,gcan" property (global can memory) to can nodes which references a "syscon" node containing the shared clock and memory addresses. - Replace the node can@40006400 (compatible "st,stm32f4-bxcan-core") with the gcan@40006600 node ("sysnode" compatible). The gcan node contains clocks and memory addresses shared by the two can nodes of which it's no longer the parent. - Add to can nodes the "st,gcan" property (global can memory) which references the gcan@40006600 node ("sysnode compatibble). - Add "dt-bindings: arm: stm32: add compatible for syscon gcan node" patch. - Drop the core driver. Thus bxcan-drv.c has been renamed to bxcan.c and moved to the drivers/net/can folder. The drivers/net/can/bxcan directory has therefore been removed. - Use the regmap_*() functions to access the shared memory registers. - Use spinlock to protect bxcan_rmw(). - Use 1 space, instead of tabs, in the macros definition. - Drop clock ref-counting. - Drop unused code. - Drop the _SHIFT macros and use FIELD_GET()/FIELD_PREP() directly. - Add BXCAN_ prefix to lec error codes. - Add the macro BXCAN_RX_MB_NUM. - Enable time triggered mode and use can_rx_offload(). - Use readx_poll_timeout() in function with timeouts. - Loop from tail to head in bxcan_tx_isr(). - Check bits of tsr register instead of pkts variable in bxcan_tx_isr(). - Don't return from bxcan_handle_state_change() if skb/cf are NULL. - Enable/disable the generation of the bus error interrupt depending on can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING. - Don't return from bxcan_handle_bus_err() if skb is NULL. - Drop statistics updating from bxcan_handle_bus_err(). - Add an empty line in front of 'return IRQ_HANDLED;' - Rename bxcan_start() to bxcan_chip_start(). - Rename bxcan_stop() to bxcan_chip_stop(). - Disable all IRQs in bxcan_chip_stop(). - Rename bxcan_close() to bxcan_ndo_stop(). - Use writel instead of bxcan_rmw() to update the dlc register. Changes in v3: - Remove 'Dario Binacchi ' SOB. - Add description to the parent of the two child nodes. - Move "patterProperties:" after "properties: in top level before "required". - Add "clocks" to the "required:" list of the child nodes. - Remove 'Dario Binacchi ' SOB. - Add "clocks" to can@0 node. - Remove 'Dario Binacchi ' SOB. - Remove a blank line. - Remove 'Dario Binacchi ' SOB. - Fix the documentation file path in the MAINTAINERS entry. - Do not increment the "stats->rx_bytes" if the frame is remote. - Remove pr_debug() call from bxcan_rmw(). Changes in v2: - Change the file name into 'st,stm32-bxcan-core.yaml'. - Rename compatibles: - st,stm32-bxcan-core -> st,stm32f4-bxcan-core - st,stm32-bxcan -> st,stm32f4-bxcan - Rename master property to st,can-master. - Remove the status property from the example. - Put the node child properties as required. - Remove a blank line. - Fix sparse errors. - Create a MAINTAINERS entry. - Remove the print of the registers address. - Remove the volatile keyword from bxcan_rmw(). - Use tx ring algorithm to manage tx mailboxes. - Use can_{get|put}_echo_skb(). - Update DT properties. Dario Binacchi (5): dt-bindings: arm: stm32: add compatible for syscon gcan node dt-bindings: net: can: add STM32 bxcan DT bindings ARM: dts: stm32: add CAN support on stm32f429 ARM: dts: stm32: add pin map for CAN controller on stm32f4 can: bxcan: add support for ST bxCAN controller .../bindings/arm/stm32/st,stm32-syscon.yaml | 2 + .../bindings/net/can/st,stm32-bxcan.yaml | 83 ++ MAINTAINERS | 7 + arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 30 + arch/arm/boot/dts/stm32f429.dtsi | 29 + drivers/net/can/Kconfig | 12 + drivers/net/can/Makefile | 1 + drivers/net/can/bxcan.c | 1088 +++++++++++++++++ 8 files changed, 1252 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml create mode 100644 drivers/net/can/bxcan.c