From patchwork Wed Mar 15 21:10:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 2797 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-ed1-f71.google.com (mail-ed1-f71.google.com [209.85.208.71]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id E2C3344C06 for ; Wed, 15 Mar 2023 22:10:59 +0100 (CET) Received: by mail-ed1-f71.google.com with SMTP id y24-20020aa7ccd8000000b004be3955a42esf29088198edt.22 for ; Wed, 15 Mar 2023 14:10:59 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1678914659; cv=pass; d=google.com; s=arc-20160816; b=tl0wGw0IoSQ+mgwf9Kaq+VMJEhoOJBp7R3l2FeAzUFe8e9s6tP2lpQqlLB7j5+gRgi PasRTxdzJ5ifQqbl85qhf/Lq1I0d9ZOYMQTyKihC9hzVbJT3qniBE09PYfQgGgyDVlzP eB9GW2xs2+dsu6GXL+VvimUTG9PERI+iGI/oXSkFtpgAPcRfDiczzlnUaofTzt8VU4ug o53a68QWli4zJ9dTBgyuGoAyp0aZRRY2JjPt9umQc9YpuxT4NOAcTIeWHYlJh81C47PD WO9CDQd051wVeMgbfRFPTmj8jPmqPlsGVsacrRK0+GioEQgDYzV2HDV7p3J+GD/JJqns vU1w== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:mime-version:message-id:date:subject:cc:to :from:dkim-signature; bh=7g3fhpSvzMpbGbm1YBpq1qtmT41ncRGKBEpmv2LEGp4=; b=c3p330q1ksiCLM4k/HmXv63BqQnciQ8jgV/42NCLkyEfxv+svkWOVxcMztXIRZj9u5 6aFEHzv7Z2x+NFy57v0NUa4I3dWy0uId3Pi5gQrSAMPcRWS/Q7YiaMx9UwuuVuDvIn1+ CPTPA4125wc0jH7p36rs7JBLRqymTQHT4b114Wm3bf84Zvi7uYrHMo0IDKTu4Mohcd04 fbv8fgLZgq6TzDgn+QeWctzY4AqiJ9wNdKIIMxh/WpvAX3YBkYbDsBAiZL93LCv94160 OO9raBzdJVGw/0KifIf6VkpVsGEDeoLSswwDsTSfBINqvoocRSe9HvKSOZ8HhyQObvuD M7tA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=fSVEj38g; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1678914659; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:x-original-authentication-results :x-original-sender:mime-version:message-id:date:subject:cc:to:from :from:to:cc:subject:date:message-id:reply-to; bh=7g3fhpSvzMpbGbm1YBpq1qtmT41ncRGKBEpmv2LEGp4=; b=IvBSmZ0UyNnH1LHheZ+6buEojxJVrGyzrrFLtBSR68duvURNBy7crpAXKPv5l0nZdB HUwBZZeyffeMkTdBiaV3UpKZg6C8nykGKnnXzKdbedJztgzwVlnv0WOf/eYQeGwLfmfW d+++p8m3GYadFCkkwzTMus1dtNSUNr9Dbn9Xg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678914659; h=list-unsubscribe:list-archive:list-help:list-post :x-spam-checked-in-group:list-id:mailing-list:precedence :x-original-authentication-results:x-original-sender:mime-version :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7g3fhpSvzMpbGbm1YBpq1qtmT41ncRGKBEpmv2LEGp4=; b=jmpC3m2pfJd7ems5Cno+wMb7oPmvmPsAXjyP67rn4qusX5u5QP2OUB2kE+NTFoFotv iS4n8Ea0FMHCRIPTQBZxqoewisCgCPgpVVWOvMMQ3QXqBuE09YLchFoBBhQA35xXfxT1 Dnz76wMJJbrgRbhvXrexRemXQge0FDmOQ+zXZJl8sbHeWhCVtxoxDaxet7GVwenKtZhc E9lLhzv7cJxwBmJ4auT2xRzhCtk+RRtEa+K9PVZlC8Hn/LLUeRMrpYzG8BODgj5L7Djc Xb4y5O1qU8jbdPcWazJ2Tld3c0YOclIGA+mhDXuuWqShBbtVvs41ehx+VVE7Ni+72edc KwDA== X-Gm-Message-State: AO0yUKVIdzBvMoj8bU835uHoRIZZCFCJSzk7SMFRJ6Xx3hSbvtm+9fyJ UX5ArWgS4wx1HyHygsW4TrcunAeW X-Google-Smtp-Source: AK7set9TsdYcdZnfbRZO6NboRwRAsYpKGsAMGol3kOcP1YcP2v+6Z+dvyLA6++uPRP2kkn/cTyOg+A== X-Received: by 2002:a50:a412:0:b0:4fb:9735:f917 with SMTP id u18-20020a50a412000000b004fb9735f917mr2244095edb.8.1678914659200; Wed, 15 Mar 2023 14:10:59 -0700 (PDT) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a17:907:3e20:b0:91e:f60d:9c58 with SMTP id hp32-20020a1709073e2000b0091ef60d9c58ls9465772ejc.5.-pod-prod-gmail; Wed, 15 Mar 2023 14:10:58 -0700 (PDT) X-Received: by 2002:a17:907:38b:b0:8af:4dab:cf6c with SMTP id ss11-20020a170907038b00b008af4dabcf6cmr7790483ejb.23.1678914657542; Wed, 15 Mar 2023 14:10:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1678914657; cv=none; d=google.com; s=arc-20160816; b=yKo8XO4plHSztK5mxgLQRnS/dNsOJbm68shGQPIlLqvpvdw3tY6vF1BPwXkgwhDHQl d/39bUZEvwC/pMk8Jgr2lfAp79fcGvGf/WlPFYzqsst1SbGS67E3+JjefV7915JMMImB y3z5IVSyvk/VI+PBDoOFLq2JMJzXxxdHpXvawMuQu9xJypKH5d22azLvKQo4P33tMkG/ /YdnSlpeKQRsjflLq/fih3CyFobfi4FkRiKytt8+pzsSTrlMYA/ArF5OBvhE7USkHZ7g z+Jsz0MSOOHH2zmqm3Jc4DE1Q+e1KP9Js4rhLq0HBVFLAG8hwcPAyIxy4JdI7IJDPZn6 nOMw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:dkim-signature; bh=nmKHBHnPdxu/HZFwVcQ6tfAQn/CQ7f4jjd7l14TU8o8=; b=L7iyWttz0aepWg3XulKrzmqdiyW7C2bEHag20afO3PNGlAlQgdO7dSv0qnWNBratyc FKXOHaBDpOh4AH3uuCVy9X1GrKDPcxqphs4NcmaEIDpqyJkLZfSfzSVIwZwh7qh7RQZj J2ar8nJzW9I75ExuasaAgALuVxp4/cLctnGfDRMt7iI9T/uBrStJGVukuyvNARX9r9i1 f28MLUsCh5hzjLYYNgCgMO0TtUsILaSkCw4fO0V/QZN3iy9Sc9g8Eedhzyl5U2dZXP6R QW6O53ONecbMiOAN0Va2h+3LLsnCQuf112qa5b8hE3Pn7DKT0A+5WZWcggN9Qbig7R5/ XBUQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=fSVEj38g; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Received: from mail-sor-f41.google.com (mail-sor-f41.google.com. [209.85.220.41]) by mx.google.com with SMTPS id hd20-20020a170907969400b008eb70b25f6bsor4383690ejc.5.2023.03.15.14.10.57 for (Google Transport Security); Wed, 15 Mar 2023 14:10:57 -0700 (PDT) Received-SPF: pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a17:906:7f12:b0:926:815e:838 with SMTP id d18-20020a1709067f1200b00926815e0838mr8754863ejr.51.1678914657103; Wed, 15 Mar 2023 14:10:57 -0700 (PDT) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-87-0-96-89.retail.telecomitalia.it. [87.0.96.89]) by smtp.gmail.com with ESMTPSA id o15-20020a170906600f00b0092b5384d6desm2965366ejj.153.2023.03.15.14.10.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Mar 2023 14:10:56 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski , Amarula patchwork , Vincent Mailhol , Alexandre Torgue , michael@amarulasolutions.com, Rob Herring , Marc Kleine-Budde , Dario Binacchi , Christophe Roullier , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Krzysztof Kozlowski , Mark Brown , Maxime Coquelin , Paolo Abeni , Rob Herring , Sebastian Reichel , Viresh Kumar , Wolfgang Grandegger , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-can@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, netdev@vger.kernel.org Subject: [RESEND PATCH v7 0/5] can: bxcan: add support for ST bxCAN controller Date: Wed, 15 Mar 2023 22:10:35 +0100 Message-Id: <20230315211040.2455855-1-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=fSVEj38g; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The series adds support for the basic extended CAN controller (bxCAN) found in many low- to middle-end STM32 SoCs. The driver design (one core module and one driver module) was inspired by other ST drivers (e. g. drivers/iio/adc/stm32-adc.c, drivers/iio/adc/stm32-adc-core.c) where device instances share resources. The shared resources functions are implemented in the core module, the device driver in a separate module. The driver has been tested on the stm32f469i-discovery board with a kernel version 5.19.0-rc2 in loopback + silent mode: ip link set can0 type can bitrate 125000 loopback on listen-only on ip link set up can0 candump can0 -L & cansend can0 300#AC.AB.AD.AE.75.49.AD.D1 For uboot and kernel compilation, as well as for rootfs creation I used buildroot: make stm32f469_disco_sd_defconfig make but I had to patch can-utils and busybox as can-utils and iproute are not compiled for MMU-less microcotrollers. In the case of can-utils, replacing the calls to fork() with vfork(), I was able to compile the package with working candump and cansend applications, while in the case of iproute, I ran into more than one problem and finally I decided to extend busybox's ip link command for CAN-type devices. I'm still wondering if it was really necessary, but this way I was able to test the driver. Changes in v7: - Add Vincent Mailhol's Reviewed-by tag. - Remove all unused macros for reading/writing the controller registers. - Add CAN_ERR_CNT flag to notify availability of error counter. - Move the "break" before the newline in the switch/case statements. - Print the mnemotechnic instead of the error value in each netdev_err(). - Remove the debug print for timings parameter. - Do not copy the data if CAN_RTR_FLAG is set in bxcan_start_xmit(). - Populate ndev->ethtool_ops with the default timestamp info. Changes in v6: - move can1 node before gcan to keep ordering by address. Changes in v5: - Add Rob Herring's Acked-by tag. - Add Rob Herring's Reviewed-by tag. - Put static in front of bxcan_enable_filters() definition. Changes in v4: - Remove "st,stm32f4-bxcan-core" compatible. In this way the can nodes (compatible "st,stm32f4-bxcan") are no longer children of a parent node with compatible "st,stm32f4-bxcan-core". - Add the "st,gcan" property (global can memory) to can nodes which references a "syscon" node containing the shared clock and memory addresses. - Replace the node can@40006400 (compatible "st,stm32f4-bxcan-core") with the gcan@40006600 node ("sysnode" compatible). The gcan node contains clocks and memory addresses shared by the two can nodes of which it's no longer the parent. - Add to can nodes the "st,gcan" property (global can memory) which references the gcan@40006600 node ("sysnode compatibble). - Add "dt-bindings: arm: stm32: add compatible for syscon gcan node" patch. - Drop the core driver. Thus bxcan-drv.c has been renamed to bxcan.c and moved to the drivers/net/can folder. The drivers/net/can/bxcan directory has therefore been removed. - Use the regmap_*() functions to access the shared memory registers. - Use spinlock to protect bxcan_rmw(). - Use 1 space, instead of tabs, in the macros definition. - Drop clock ref-counting. - Drop unused code. - Drop the _SHIFT macros and use FIELD_GET()/FIELD_PREP() directly. - Add BXCAN_ prefix to lec error codes. - Add the macro BXCAN_RX_MB_NUM. - Enable time triggered mode and use can_rx_offload(). - Use readx_poll_timeout() in function with timeouts. - Loop from tail to head in bxcan_tx_isr(). - Check bits of tsr register instead of pkts variable in bxcan_tx_isr(). - Don't return from bxcan_handle_state_change() if skb/cf are NULL. - Enable/disable the generation of the bus error interrupt depending on can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING. - Don't return from bxcan_handle_bus_err() if skb is NULL. - Drop statistics updating from bxcan_handle_bus_err(). - Add an empty line in front of 'return IRQ_HANDLED;' - Rename bxcan_start() to bxcan_chip_start(). - Rename bxcan_stop() to bxcan_chip_stop(). - Disable all IRQs in bxcan_chip_stop(). - Rename bxcan_close() to bxcan_ndo_stop(). - Use writel instead of bxcan_rmw() to update the dlc register. Changes in v3: - Remove 'Dario Binacchi ' SOB. - Add description to the parent of the two child nodes. - Move "patterProperties:" after "properties: in top level before "required". - Add "clocks" to the "required:" list of the child nodes. - Remove 'Dario Binacchi ' SOB. - Add "clocks" to can@0 node. - Remove 'Dario Binacchi ' SOB. - Remove a blank line. - Remove 'Dario Binacchi ' SOB. - Fix the documentation file path in the MAINTAINERS entry. - Do not increment the "stats->rx_bytes" if the frame is remote. - Remove pr_debug() call from bxcan_rmw(). Changes in v2: - Change the file name into 'st,stm32-bxcan-core.yaml'. - Rename compatibles: - st,stm32-bxcan-core -> st,stm32f4-bxcan-core - st,stm32-bxcan -> st,stm32f4-bxcan - Rename master property to st,can-master. - Remove the status property from the example. - Put the node child properties as required. - Remove a blank line. - Fix sparse errors. - Create a MAINTAINERS entry. - Remove the print of the registers address. - Remove the volatile keyword from bxcan_rmw(). - Use tx ring algorithm to manage tx mailboxes. - Use can_{get|put}_echo_skb(). - Update DT properties. Dario Binacchi (5): dt-bindings: arm: stm32: add compatible for syscon gcan node dt-bindings: net: can: add STM32 bxcan DT bindings ARM: dts: stm32: add CAN support on stm32f429 ARM: dts: stm32: add pin map for CAN controller on stm32f4 can: bxcan: add support for ST bxCAN controller .../bindings/arm/stm32/st,stm32-syscon.yaml | 2 + .../bindings/net/can/st,stm32-bxcan.yaml | 83 ++ MAINTAINERS | 7 + arch/arm/boot/dts/stm32f4-pinctrl.dtsi | 30 + arch/arm/boot/dts/stm32f429.dtsi | 29 + drivers/net/can/Kconfig | 12 + drivers/net/can/Makefile | 1 + drivers/net/can/bxcan.c | 1088 +++++++++++++++++ 8 files changed, 1252 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/can/st,stm32-bxcan.yaml create mode 100644 drivers/net/can/bxcan.c