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([151.37.190.149]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aa51a449c24sm537671966b.178.2024.11.26.01.46.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Nov 2024 01:46:37 -0800 (PST) From: Patrick Barsanti To: linux-amarula@amarulasolutions.com Cc: dario.binacchi@amarulasolutions.com, patrick.barsanti@amarulasolutions.com Subject: [PATCH 00/11] WIP: Refactor Engicam IMX8MP and add C.TOUCH 2.0 10.1" Date: Tue, 26 Nov 2024 10:46:24 +0100 Message-ID: <20241126094635.881134-1-patrick.barsanti@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-Original-Sender: patrick.barsanti@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b="aG3RoOA/"; spf=pass (google.com: domain of patrick.barsanti@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=patrick.barsanti@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=pass header.i=@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The aim of this series is to refactor Engicam i.Core MX8M Plus SoM family and the carrier boards based on them, and add support for Engicam i.Core MX8M Plus C.TOUCH 2.0 10.1" carrier board. Add extra layer with one dtsi for each i.Core MX8M Plus module, which are the normal, Fast Ethernet, and 2GbE versions. This is done to better separate, both in the already present EDIMM 2.0 and in the newly added C.TOUCH 2.0, which parts in the devicetree refer to the SoM and which to the carrier board itself. Additionally, this helps to avoid redundant code if any more carrier boards by Engicam based on these SoM will be added in the future. Make naming more clear by removing redundant `mx8mp` notation when possible for backwards compatibility reasons. Add support for Ampire, AM-1280800W8TZQW-T00H 10.1" panel, which is used on the C.TOUCH 2.0 10.1" board. Add support for Engicam i.Core MX8M Plus C.TOUCH 2.0 10.1". Dario Binacchi (1): drm/panel: simple: Add AM-1280800W8TZQW-T00H Manoj Sai (2): dt-bindings: arm: fsl: Add Engicam i.Core MX8M Plus C.TOUCH 2.0 10.1" OF arm64: dts: freescale: Add Engicam i.Core MX8M Plus C.TOUCH 2.0 10.1" OF Patrick Barsanti (8): dt-bindings: arm: fsl: Add engicam,icore-mx8mp family arm64: dts: freescale: Move include in Engicam IMX8MP EDIMM arm64: dts: freescale: Fix style in imx8mp-icore-mx8mp.dtsi arm64: dts: freescale: Add Engicam i.Core MX8M Plus family arm64: dts: freescale: Fix compatibles of imx8mp-icore family arm64: dts: freescale: Refactor icore-mx8mp-edimm2.2.dts arm64: dts: freescale: Rename imx8mp-icore-mx8mp.dtsi dt-bindings: display: simple: Add ampire,am-1280800n3tzqw-t00h panel .../devicetree/bindings/arm/fsl.yaml | 9 +- .../bindings/display/panel/panel-simple.yaml | 2 + arch/arm64/boot/dts/freescale/Makefile | 1 + .../boot/dts/freescale/imx8mp-icore-2gbe.dtsi | 17 ++ ...core-mx8mp.dtsi => imx8mp-icore-base.dtsi} | 6 +- .../dts/freescale/imx8mp-icore-fasteth.dtsi | 45 +++ .../imx8mp-icore-mx8mp-ctouch2-of10.dts | 269 ++++++++++++++++++ .../freescale/imx8mp-icore-mx8mp-edimm2.2.dts | 28 +- .../boot/dts/freescale/imx8mp-icore.dtsi | 38 +++ drivers/gpu/drm/panel/panel-simple.c | 28 ++ 10 files changed, 415 insertions(+), 28 deletions(-) create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-icore-2gbe.dtsi rename arch/arm64/boot/dts/freescale/{imx8mp-icore-mx8mp.dtsi => imx8mp-icore-base.dtsi} (97%) create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-icore-fasteth.dtsi create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-icore-mx8mp-ctouch2-of10.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-icore.dtsi