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[209.85.220.41]) by mx.google.com with SMTPS id ffacd0b85a97d-3912bfda36dsor344821f8f.3.2025.03.06.03.30.32 for (Google Transport Security); Thu, 06 Mar 2025 03:30:32 -0800 (PST) Received-SPF: pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Forwarded-Encrypted: i=1; AJvYcCUEEAHQL5SFAtbhiDtB+MsKyKM2qWqap/27QBEEKyAUZgsjyiuhPMFGbJizWszejBr9kzCFsLT04pPqSoSr@amarulasolutions.com X-Gm-Gg: ASbGncvnUKZKhhoTCixkN3FE9MdPDUdRYKh2UXB+TwdV3lrHlyOrUcWgTYqHBQnn00V gBxFzMBQ+KlOTdvE7/HcWiYoDiUob75c+jhl0slT0AR/VI0tGaGCXwTJNUBD35bdMJjsSLQZaFX 0+B4mkoxbO5AAjaYM6wIw7xlZnky6M3pJNWnJiO4FmnvlNamOTUXPECcbD4t3hath0Yg9akHDCt jvSWgeCfXQYF1ZdcSw5Z7wGyoEfjZ06cSQ2k7r/kvJaQumfgh++ZTiF3hEChxhRfai4d3TaihDx XtXcSe+Lprj18k+B/zUftPEXmbKvnrlShLtMrmFMbG1KhOYKEbJPiSZhtq1jrlS9Yvsp6roOL93 se0T4Rg== X-Received: by 2002:a05:6000:4022:b0:390:ffd0:4138 with SMTP id ffacd0b85a97d-3911f756719mr5772700f8f.24.1741260632475; Thu, 06 Mar 2025 03:30:32 -0800 (PST) Received: from localhost.localdomain ([2001:b07:6474:ebbf:4703:aa8c:6eab:8161]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3912bfb79b9sm1749650f8f.3.2025.03.06.03.30.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 06 Mar 2025 03:30:31 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Stephen Boyd , Peng Fan , Abel Vesa , linux-amarula@amarulasolutions.com, Dario Binacchi , Conor Dooley , Dan Carpenter , Fabio Estevam , Krzysztof Kozlowski , Michael Turquette , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org Subject: [PATCH v10 00/18] Support spread spectrum clocking for i.MX8M PLLs Date: Thu, 6 Mar 2025 12:27:49 +0100 Message-ID: <20250306112959.242131-1-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b="OT3/QuZ3"; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=pass header.i=@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This version keeps the version v9 patches that can be merged and removes the patches that will need to be modified in case Peng's PR https://github.com/devicetree-org/dt-schema/pull/154 is accepted. The idea is to speed up the merging of the patches in the series that have already been reviewed and are not dependent on the introduction of the assigned-clocks-sscs property, and postpone the patches for spread spectrum to a future series once it becomes clear what needs to be done. Specifically, the patches: 01/18 dt-bindings: clock: imx8mm: add VIDEO_PLL clocks 02/18 clk: imx8mm: rename video_pll1 to video_pll 03/18 dt-bindings: clock: imx8mp: add VIDEO_PLL clocks 04/18 clk: imx8mp: rename video_pll1 to video_pll are a replica for i.MX8MM and i.MX8MP of the patch for i.MX8MM bedcf9d1dcf88 ("clk: imx: rename video_pll1 to video_pll"), which was merged some time ago. The patches are split into four because, during the review, Krzysztof asked me to separate the driver modifications from the dt-bindings changes. All the other patches in the series, from 5 to 18, are necessary for the implementation of the anatop driver for i.MX8M{M,N,P}. The review of this series has taken a long time, partly due to misunderstandings arising from incorrect design choices. As Peng stated in [1]: "In current design, CCM is taken as producer of CLK_IMX8M_VIDEO_PLL, not consumer." These patches fix this issue by ensuring that the PLLs are now produced by Anatop and consumed by CCM, aligning with the hardware logic. Finally, a clarification: I decided to keep the same title for the series despite having removed all the patches for spread spectrum support in order to maintain a clear connection with the previous versions. [1] https://patchwork.kernel.org/project/linux-clk/patch/20241106090549.3684963-2-dario.binacchi@amarulasolutions.com/ Changes in v10: - Drop the v9 patches: 16/23 dt-bindings: clock: imx8m-clock: support spread spectrum clocking 17/23 clk: imx: pll14xx: support spread spectrum clock generation 17/23 clk: imx8mn: support spread spectrum clock generation 21/23 clk: imx8mp: support spread spectrum clock generation 23/23 clk: imx8mm: support spread spectrum clock generation Changes in v9: - Add 'Reviewed-by' tag of Peng Fan for imx8mn platform patches - Fix building warning raised by the kernel test robot for patch v8, 11/18 clk: imx: add support for i.MX8MN anatop clock driver - Add patches for imx8m{m,p} platforms: - 23/23 clk: imx8mm: support spread spectrum clock generation - 22/23 clk: imx: add support for i.MX8MM anatop clock driver - 21/23 clk: imx8mp: support spread spectrum clock generation - 20/23 clk: imx8mp: rename ccm_base to base - 19/23 clk: imx: add support for i.MX8MP anatop clock driver Changes in v8: - Drop the patches added in version 7: - 10/23 dt-bindings: clock: imx8m-clock: add phandle to the anatop - 11/23 arm64: dts: imx8mm: add phandle to anatop within CCM - 12/23 arm64: dts: imx8mn: add phandle to anatop within CCM - 13/23 arm64: dts: imx8mp: add phandle to anatop within CCM - 14/23 arm64: dts: imx8mq: add phandle to anatop within CCM Changes in v7: - Add and manage fsl,anatop property as phandle to the anatop node with the new patches: - 10/23 dt-bindings: clock: imx8m-clock: add phandle to the anatop - 11/23 arm64: dts: imx8mm: add phandle to anatop within CCM - 12/23 arm64: dts: imx8mn: add phandle to anatop within CCM - 13/23 arm64: dts: imx8mp: add phandle to anatop within CCM - 14/23 arm64: dts: imx8mq: add phandle to anatop within CCM Changes in v6: - Merge patches: 10/20 dt-bindings: clock: imx8mm: add binding definitions for anatop 11/20 dt-bindings: clock: imx8mn: add binding definitions for anatop 12/20 dt-bindings: clock: imx8mp: add binding definitions for anatop to 05/20 dt-bindings: clock: imx8m-anatop: define clocks/clock-names now renamed 05/18 dt-bindings: clock: imx8m-anatop: add oscillators and PLLs - Split the patch 15/20 dt-bindings-clock-imx8m-clock-support-spread-spectru.patch into 12/18 dt-bindings: clock: imx8m-clock: add PLLs 16/18 dt-bindings: clock: imx8m-clock: support spread spectrum clocking Changes in v5: - Fix compilation errors. - Separate driver code from dt-bindings Changes in v4: - Add dt-bindings for anatop - Add anatop driver - Drop fsl,ssc-clocks from spread spectrum dt-bindings Changes in v3: - Patches 1/8 has been added in version 3. The dt-bindings have been moved from fsl,imx8m-anatop.yaml to imx8m-clock.yaml. The anatop device (fsl,imx8m-anatop.yaml) is indeed more or less a syscon, so it represents a memory area accessible by ccm (imx8m-clock.yaml) to setup the PLLs. - Patches {3,5}/8 have been added in version 3. - Patches {4,6,8}/8 use ccm device node instead of the anatop one. Changes in v2: - Add "allOf:" and place it after "required:" block, like in the example schema. - Move the properties definition to the top-level. - Drop unit types as requested by the "make dt_binding_check" command. Dario Binacchi (18): dt-bindings: clock: imx8mm: add VIDEO_PLL clocks clk: imx8mm: rename video_pll1 to video_pll dt-bindings: clock: imx8mp: add VIDEO_PLL clocks clk: imx8mp: rename video_pll1 to video_pll dt-bindings: clock: imx8m-anatop: add oscillators and PLLs arm64: dts: imx8mm: add anatop clocks arm64: dts: imx8mn: add anatop clocks arm64: dts: imx8mp: add anatop clocks arm64: dts: imx8mq: add anatop clocks clk: imx: add hw API imx_anatop_get_clk_hw clk: imx: add support for i.MX8MM anatop clock driver clk: imx: add support for i.MX8MN anatop clock driver clk: imx: add support for i.MX8MP anatop clock driver clk: imx8mp: rename ccm_base to base dt-bindings: clock: imx8m-clock: add PLLs arm64: dts: imx8mm: add PLLs to clock controller module (CCM) arm64: dts: imx8mn: add PLLs to clock controller module (CCM) arm64: dts: imx8mp: add PLLs to clock controller module (CCM) .../bindings/clock/fsl,imx8m-anatop.yaml | 53 +- .../bindings/clock/imx8m-clock.yaml | 27 +- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 11 +- arch/arm64/boot/dts/freescale/imx8mn.dtsi | 11 +- arch/arm64/boot/dts/freescale/imx8mp.dtsi | 11 +- arch/arm64/boot/dts/freescale/imx8mq.dtsi | 2 + drivers/clk/imx/Makefile | 6 +- drivers/clk/imx/clk-imx8mm-anatop.c | 287 ++++++++ drivers/clk/imx/clk-imx8mm.c | 262 ++++--- drivers/clk/imx/clk-imx8mn-anatop.c | 283 ++++++++ drivers/clk/imx/clk-imx8mn.c | 183 +++-- drivers/clk/imx/clk-imx8mp-anatop.c | 306 ++++++++ drivers/clk/imx/clk-imx8mp.c | 672 +++++++++--------- drivers/clk/imx/clk.c | 15 + drivers/clk/imx/clk.h | 2 + include/dt-bindings/clock/imx8mm-clock.h | 76 +- include/dt-bindings/clock/imx8mn-clock.h | 64 ++ include/dt-bindings/clock/imx8mp-clock.h | 80 ++- 18 files changed, 1740 insertions(+), 611 deletions(-) create mode 100644 drivers/clk/imx/clk-imx8mm-anatop.c create mode 100644 drivers/clk/imx/clk-imx8mn-anatop.c create mode 100644 drivers/clk/imx/clk-imx8mp-anatop.c