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[82.56.38.125]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b23a1227bacsm60449766b.41.2025.09.18.08.52.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Sep 2025 08:52:43 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: Frank Li , linux-amarula@amarulasolutions.com, Dario Binacchi , Conor Dooley , Dmitry Torokhov , Fabio Estevam , Haibo Chen , Javier Carrasco , Jeff LaBundy , Krzysztof Kozlowski , Michael Trimarchi , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo , devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-input@vger.kernel.org Subject: [PATCH v5 0/6] Input: imx6ul_tsc - set glitch threshold by dts property Date: Thu, 18 Sep 2025 17:52:28 +0200 Message-ID: <20250918155240.2536852-1-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=cxIv2QY+; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=pass header.i=@amarulasolutions.com Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The series allows setting the glitch threshold for the detected signal from a DTS property instead of a hardcoded value. In addition, I applied a patch that replaces opencoded masking and shifting, with BIT(), GENMASK(), FIELD_GET() and FIELD_PREP() macros. I didn’t remove patches: - 2/6 Input: imx6ul_tsc - use BIT, FIELD_{GET,PREP} and GENMASK macros - 1/6 Input: imx6ul_tsc - fix typo in register name even though they were accepted, to avoid generating conflicts detected by the kernel test robot. Changes in v5: - I didn’t remove patches: - 2/6 Input: imx6ul_tsc - use BIT, FIELD_{GET,PREP} and GENMASK macros - 1/6 Input: imx6ul_tsc - fix typo in register name even though they were accepted, to avoid generating conflicts detected by the kernel test robot. Changes in v4: - Adjust property description fsl,imx6ul-tsc.yaml following the suggestions of Conor Dooley and Frank Li. Changes in v3: - Remove the final part of the description that refers to implementation details in fsl,imx6ul-tsc.yaml. Changes in v2: - Replace patch ("dt-bindings: input: touchscreen: fsl,imx6ul-tsc: add fsl,glitch-threshold") with ("dt-bindings: touchscreen: add touchscreen-glitch-threshold-ns property"), making the previous property general by moving it to touchscreen.yaml. - Rework "Input: imx6ul_tsc - set glitch threshold by DTS property" patch to match changes made to the DTS property. - Move "Input: imx6ul_tsc - use BIT, FIELD_{GET,PREP} and GENMASK macros" patch right after the patch fixing the typo. Dario Binacchi (5): Input: imx6ul_tsc - use BIT, FIELD_{GET,PREP} and GENMASK macros dt-bindings: touchscreen: add touchscreen-glitch-threshold-ns property dt-bindings: touchscreen: fsl,imx6ul-tsc: support glitch thresold ARM: dts: imx6ull-engicam-microgea-bmm: set touchscreen glitch threshold Input: imx6ul_tsc - set glitch threshold by DTS property Michael Trimarchi (1): Input: imx6ul_tsc - fix typo in register name .../input/touchscreen/fsl,imx6ul-tsc.yaml | 14 ++ .../input/touchscreen/touchscreen.yaml | 4 + .../nxp/imx/imx6ull-engicam-microgea-bmm.dts | 1 + drivers/input/touchscreen/imx6ul_tsc.c | 122 +++++++++++------- 4 files changed, 97 insertions(+), 44 deletions(-)