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[209.85.220.41]) by mx.google.com with SMTPS id a640c23a62f3a-bf079290c6fsor429206466b.13.2026.06.08.07.22.26 for (Google Transport Security); Mon, 08 Jun 2026 07:22:26 -0700 (PDT) Received-SPF: pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Gm-Gg: Acq92OGTqjz8i3MljJulWMOL3z6alZfmcvEt2mdL+RIYsywe00UxjqzoFhIuAEtQC19 LdSy86lwDqXgpug5Rex2+ViJNi98b52+uIOcP15eLFW5/vU30I3T7grWxkYu1MtSSNzvCEjjtDl g0os4q4zGm4ccXJMkFhWqvSYlhkz9taetosP4TeW7nR9jRzk/RbxLajtYtT15q2s1NvyB2E7b6h IHfmcovDM5m/PgF/Z+RHZrF7SszCRFVyKl7HT8WWzSwZKh33+eyO8S0Pi+oYWPJ9znj9BaeAluQ mNR6NO9XZgk/xsRqj9ImrcfDczCoiqczn6V0yNlzPdprUgZcneryLRo0ax26qPvlbMlLgW/+f+f Whh6nSGxr8rXVQEx39G0z23XLKe79YRuFL7tjHUbqyyclXdXIFGDAFRyY2oP6NsH0kLRJyGi/Cv smdE/VWsu2D+hr+Z2M8FTQuQJR3vOV2X4Uqb0uxupoeXRhI9llSx0LMuHy8jdQfEeBF2wu+/JwY 0krwdjKefJzb1/Y+qvo/Z4KkTS1fl5Q6VCIAVW/4uCwDJWB5XBTl6Wz6OU= X-Received: by 2002:a17:907:8b93:b0:bd5:2859:ed0a with SMTP id a640c23a62f3a-bf373306ce1mr774111666b.42.1780928545606; Mon, 08 Jun 2026 07:22:25 -0700 (PDT) Received: from dario-ThinkPad-P14s-Gen-5.amarulasolutions.com ([2.196.42.139]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bf055307a35sm881847066b.52.2026.06.08.07.22.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Jun 2026 07:22:25 -0700 (PDT) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, domenico.acri@engicam.com, michael@amarulasolutions.com, francesco.utel@engicam.com, Dario Binacchi , Alexandre Torgue , Amelie Delaunay , Bjorn Andersson , Christophe Parant , Conor Dooley , Dmitry Baryshkov , Eric Biggers , Geert Uytterhoeven , Himanshu Bhavani , Huang Shijie , Konrad Dybcio , Krzysztof Kozlowski , Krzysztof Kozlowski , Luca Weiss , Maxime Coquelin , Michal Simek , Rob Herring , Sven Peter , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v5 00/16] arm64: support Engicam MicroGEA-STM32MP257-RMM board Date: Mon, 8 Jun 2026 16:20:17 +0200 Message-ID: <20260608142221.952245-1-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b="odssks/3"; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com; dara=neutral header.i=@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , This series adds initial support for the Engicam MicroGEA-STM32MP257-RMM board based on the MicroGEA-STM32MP257 SoM. The support includes device tree descriptions for both the SoM and the carrier board, together with the required pinctrl definitions for the peripherals used. The series also updates the arm64 defconfig accordingly. Changes in v5: - Add patch 2/16 arm64: dts: st: add power-domains to sdmmc1 on stm32mp231 - Add patch 3/16 arm64: dts: st: add power-domains to sdmmc1 on stm32mp251 - Increase slew-rate to <1> of ltdc pins to support the 27 MHz pixel clock and prevent timing violations. - Change SDMMC2_CK pin bias from pull-up to bias-disable to avoid signal integrity issues on the clock line - Fix touchscreen resolution to 480x854 - Fix SPI1 CS0 polarity to GPIO_ACTIVE_LOW Changes in v4: - Drop inclusion of stm32mp25xf.dtsi from stm32mp257-engicam-microgea.dtsi Changes in v3: - Add power-domains property in the SDMMC2 node. - Drop patch "arm64: defconfig: cleanup the defconfig" Changes in v2: - Add Acked-by of Conor Dooley for patch 0/1 "dt-bindings: arm: stm32: support Engicam MicroGEA-STM32MP257-RMM board" - Add resets property to dts CAN node. Suggested by Sashiko. - Drop the clocks property from the sai1 node in stm32mp257-engicam-microgea-rmm.dts to avoid overriding the peripheral bus clock reference defined in the base SoC device tree. Suggested by Sashiko. - Reference the existing labeled nodes directly at the root level using &sai1a and &sai1b in stm32mp257-engicam-microgea-rmm.dts instead of redefining the entire node structure and redeclaring the labels. Suggested by Sashiko. - Drop the #clock-cells property from sai1a and remove the reference to sai1a from the clocks array in sai1b, relying strictly on the st,sync property to handle internal synchronization. Dario Binacchi (16): dt-bindings: arm: stm32: support Engicam MicroGEA-STM32MP257-RMM board arm64: dts: st: add power-domains to sdmmc1 on stm32mp231 arm64: dts: st: add power-domains to sdmmc1 on stm32mp251 arm64: dts: st: add SDMMC2 support on stm32mp25 arm64: dts: st: add CAN1 support on stm32mp25 arm64: dts: st: add i2c1 pins for stm32mp25 arm64: dts: st: add ltdc pins for stm32mp25 arm64: dts: st: add can1 pins for stm32mp25 arm64: dts: st: add pwm2/pwm4 pins for stm32mp25 arm64: dts: st: add sai1 pins for stm32mp25 arm64: dts: st: add sdmmc2 pins for stm32mp25 arm64: dts: st: add spi1 pins for stm32mp25 arm64: dts: st: add usart1 pins for stm32mp25 arm64: dts: st: support Engicam MicroGEA-STM32MP257 SoM arm64: dts: st: support Engicam MicroGEA-STM32MP257-RMM board arm64: defconfig: enable configs for Engicam MicroGEA-STM32MP257-RMM .../devicetree/bindings/arm/stm32/stm32.yaml | 7 + arch/arm64/boot/dts/st/Makefile | 1 + arch/arm64/boot/dts/st/stm32mp231.dtsi | 1 + arch/arm64/boot/dts/st/stm32mp25-pinctrl.dtsi | 328 ++++++++++++++++++ arch/arm64/boot/dts/st/stm32mp251.dtsi | 17 + arch/arm64/boot/dts/st/stm32mp253.dtsi | 16 + .../st/stm32mp257-engicam-microgea-rmm.dts | 319 +++++++++++++++++ .../dts/st/stm32mp257-engicam-microgea.dtsi | 63 ++++ arch/arm64/configs/defconfig | 4 + 9 files changed, 756 insertions(+) create mode 100644 arch/arm64/boot/dts/st/stm32mp257-engicam-microgea-rmm.dts create mode 100644 arch/arm64/boot/dts/st/stm32mp257-engicam-microgea.dtsi