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[93.46.124.24]) by smtp.gmail.com with ESMTPSA id u13sm6108580wmd.36.2020.01.01.08.31.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Jan 2020 08:31:40 -0800 (PST) From: Michael Trimarchi To: Shawn Guo Cc: Sascha Hauer , Pengutronix Kernel Team , NXP Linux Team , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Fabio Estevam , Rob Herring , Mark Rutland , linux-amarula@amarulasolutions.com Subject: [PATCH 2/3] irqchip/irq-imx-gpcv2: Add IRQCHIP_DECLARE for i.MX8MM compatible Date: Wed, 1 Jan 2020 17:31:35 +0100 Message-Id: <20200101163136.1586-3-michael@amarulasolutions.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200101163136.1586-1-michael@amarulasolutions.com> References: <20200101163136.1586-1-michael@amarulasolutions.com> X-Original-Sender: michael@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=HTgpjlTE; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The GPC node on i.MX8MM can not claim to be compatible with the i.MX8MQ GPC, as the power gating part has some significant differences. Thus we can not rely on the irqchip being probed with the old compatible. Signed-off-by: Michael Trimarchi --- drivers/irqchip/irq-imx-gpcv2.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/irqchip/irq-imx-gpcv2.c b/drivers/irqchip/irq-imx-gpcv2.c index 4f74c15c4755..80855f15539c 100644 --- a/drivers/irqchip/irq-imx-gpcv2.c +++ b/drivers/irqchip/irq-imx-gpcv2.c @@ -196,6 +196,7 @@ static const struct irq_domain_ops gpcv2_irqchip_data_domain_ops = { static const struct of_device_id gpcv2_of_match[] = { { .compatible = "fsl,imx7d-gpc", .data = (const void *) 2 }, { .compatible = "fsl,imx8mq-gpc", .data = (const void *) 4 }, + { .compatible = "fsl,imx8mm-gpc", .data = (const void *) 4 }, { /* END */ } }; @@ -290,3 +291,4 @@ static int __init imx_gpcv2_irqchip_init(struct device_node *node, IRQCHIP_DECLARE(imx_gpcv2_imx7d, "fsl,imx7d-gpc", imx_gpcv2_irqchip_init); IRQCHIP_DECLARE(imx_gpcv2_imx8mq, "fsl,imx8mq-gpc", imx_gpcv2_irqchip_init); +IRQCHIP_DECLARE(imx_gpcv2_imx8mm, "fsl,imx8mm-gpc", imx_gpcv2_irqchip_init);