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[209.85.220.41]) by mx.google.com with SMTPS id 69sor6551758plc.8.2020.01.09.00.52.39 for (Google Transport Security); Thu, 09 Jan 2020 00:52:39 -0800 (PST) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a17:902:16a:: with SMTP id 97mr10266010plb.163.1578559959005; Thu, 09 Jan 2020 00:52:39 -0800 (PST) Received: from localhost.localdomain ([2405:201:c809:c7d5:d888:9871:544a:b516]) by smtp.gmail.com with ESMTPSA id o17sm2139121pjq.1.2020.01.09.00.52.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Jan 2020 00:52:38 -0800 (PST) From: Jagan Teki To: Kever Yang , Simon Glass , Philipp Tomsich Cc: u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH v4 1/8] rockchip: Add cpu-info Date: Thu, 9 Jan 2020 14:22:15 +0530 Message-Id: <20200109085222.22670-2-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20200109085222.22670-1-jagan@amarulasolutions.com> References: <20200109085222.22670-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=SmE1zTHi; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add cpu information for rockchip soc. This would help to print the SoC family number, with associated temparature, clock and reason for reset etc. Reviewed-by: Kever Yang Signed-off-by: Jagan Teki --- arch/arm/mach-rockchip/Makefile | 1 + arch/arm/mach-rockchip/cpu-info.c | 16 ++++++++++++++++ 2 files changed, 17 insertions(+) create mode 100644 arch/arm/mach-rockchip/cpu-info.c diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile index a728acda24..5b38526fe0 100644 --- a/arch/arm/mach-rockchip/Makefile +++ b/arch/arm/mach-rockchip/Makefile @@ -22,6 +22,7 @@ ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) # we can have the preprocessor correctly recognise both 0x0 and 0 # meaning "turn it off". obj-y += boot_mode.o +obj-$(CONFIG_DISPLAY_CPUINFO) += cpu-info.o obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o obj-$(CONFIG_MISC_INIT_R) += misc.o endif diff --git a/arch/arm/mach-rockchip/cpu-info.c b/arch/arm/mach-rockchip/cpu-info.c new file mode 100644 index 0000000000..9bccbd4f68 --- /dev/null +++ b/arch/arm/mach-rockchip/cpu-info.c @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * (C) Copyright 2019 Amarula Solutions(India) + * Author: Jagan Teki + */ + +#include + +int print_cpuinfo(void) +{ + printf("SoC: Rockchip %s\n", CONFIG_SYS_SOC); + + /* TODO print operating temparature and clock */ + + return 0; +}