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[209.85.220.65]) by mx.google.com with SMTPS id w6sor5989271pll.67.2020.01.24.01.34.13 for (Google Transport Security); Fri, 24 Jan 2020 01:34:13 -0800 (PST) Received-SPF: pass (google.com: domain of sunil@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:902:7c05:: with SMTP id x5mr2768608pll.236.1579858453160; Fri, 24 Jan 2020 01:34:13 -0800 (PST) Received: from localhost.localdomain ([49.206.200.248]) by smtp.gmail.com with ESMTPSA id r2sm5716470pgv.16.2020.01.24.01.34.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 24 Jan 2020 01:34:12 -0800 (PST) From: sunil@amarulasolutions.com To: jagan@amarulasolutions.com Cc: linux-amarula@amarulasolutions.com, Suniel Mahesh Subject: [PATCH 2/2] board: roc-rk3399-pc: Add support for onboard LED's and push button Date: Fri, 24 Jan 2020 15:03:58 +0530 Message-Id: <1579858438-13035-2-git-send-email-sunil@amarulasolutions.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1579858438-13035-1-git-send-email-sunil@amarulasolutions.com> References: <1579858438-13035-1-git-send-email-sunil@amarulasolutions.com> X-Original-Sender: sunil@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=IvI4y32y; spf=pass (google.com: domain of sunil@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=sunil@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Suniel Mahesh Added support for onboard LED's and push button. When powered board will be in low power mode(yellow LED), on button press, board enters full power mode(red LED) and boots u-boot. Signed-off-by: Suniel Mahesh --- arch/arm/mach-rockchip/tpl.c | 7 +++++++ board/firefly/roc-rk3399-pc/roc-rk3399-pc.c | 26 ++++++++++++++++++++++++++ configs/roc-pc-rk3399_defconfig | 1 + 3 files changed, 34 insertions(+) diff --git a/arch/arm/mach-rockchip/tpl.c b/arch/arm/mach-rockchip/tpl.c index c3734cb..c6d6596 100644 --- a/arch/arm/mach-rockchip/tpl.c +++ b/arch/arm/mach-rockchip/tpl.c @@ -39,11 +39,18 @@ __weak void rockchip_stimer_init(void) TIMER_CONTROL_REG); } +__weak int board_early_init_f(void) +{ + return 0; +} + void board_init_f(ulong dummy) { struct udevice *dev; int ret; + board_early_init_f(); + #if defined(CONFIG_DEBUG_UART) && defined(CONFIG_TPL_SERIAL_SUPPORT) /* * Debug UART can be used from here if required: diff --git a/board/firefly/roc-rk3399-pc/roc-rk3399-pc.c b/board/firefly/roc-rk3399-pc/roc-rk3399-pc.c index d47dba8..aedc15e 100644 --- a/board/firefly/roc-rk3399-pc/roc-rk3399-pc.c +++ b/board/firefly/roc-rk3399-pc/roc-rk3399-pc.c @@ -7,6 +7,10 @@ #include #include #include +#include +#include +#include +#include #ifndef CONFIG_SPL_BUILD int board_early_init_f(void) @@ -27,3 +31,25 @@ out: return 0; } #endif + +#if defined(CONFIG_TPL_BUILD) + +#define PMUGRF_BASE 0xff320000 +#define GPIO0_BASE 0xff720000 + +int board_early_init_f(void) +{ + struct rockchip_gpio_regs * const gpio0 = (void *)GPIO0_BASE; + struct rk3399_pmugrf_regs * const pmugrf = (void *)PMUGRF_BASE; + + spl_gpio_output(gpio0, GPIO(BANK_A, 2), 1); + + spl_gpio_set_pull(&pmugrf->gpio0_p, GPIO(BANK_A, 5), GPIO_PULL_NORMAL); + while (readl(&gpio0->ext_port) & 0x20); + + spl_gpio_output(gpio0, GPIO(BANK_A, 2), 0); + spl_gpio_output(gpio0, GPIO(BANK_B, 5), 1); + + return 0; +} +#endif diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index 6ce1bc2..77e162c 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -63,3 +63,4 @@ CONFIG_VIDEO_BPP32=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y +CONFIG_TPL_GPIO_SUPPORT=y