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[209.85.220.65]) by mx.google.com with SMTPS id k10sor534933pfi.31.2020.04.20.03.06.17 for (Google Transport Security); Mon, 20 Apr 2020 03:06:17 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a62:d086:: with SMTP id p128mr16890262pfg.241.1587377177106; Mon, 20 Apr 2020 03:06:17 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:7ddc:e17b:a9b3:404]) by smtp.gmail.com with ESMTPSA id n9sm712179pjt.29.2020.04.20.03.06.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Apr 2020 03:06:16 -0700 (PDT) From: Jagan Teki To: Vignesh R , u-boot@lists.denx.de Cc: Bin Meng , linux-amarula@amarulasolutions.com, Jagan Teki , Sagar Shrikant Kadam Subject: [PATCH 1/2] mtd: spi-nor: Enable QE bit for ISSI flash Date: Mon, 20 Apr 2020 15:36:06 +0530 Message-Id: <20200420100607.23009-1-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.17.1 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=Lo1Uu91l; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Enable QE bit for ISSI flash chips. QE enablement logic is similar to what Micromax has, so reuse the existing code itself. Cc: Sagar Shrikant Kadam Signed-off-by: Jagan Teki --- drivers/mtd/spi/spi-nor-core.c | 1 + include/linux/mtd/spi-nor.h | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 7b6ad495ac..e0f6e4d6c3 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -325,6 +325,7 @@ static int set_4byte(struct spi_nor *nor, const struct flash_info *info, case SNOR_MFR_MICRON: /* Some Micron need WREN command; all will accept it */ need_wren = true; + case SNOR_MFR_ISSI: case SNOR_MFR_MACRONIX: case SNOR_MFR_WINBOND: if (need_wren) diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index ec144a08d8..233fdc341a 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -22,6 +22,7 @@ #define SNOR_MFR_INTEL CFI_MFR_INTEL #define SNOR_MFR_ST CFI_MFR_ST /* ST Micro <--> Micron */ #define SNOR_MFR_MICRON CFI_MFR_MICRON /* ST Micro <--> Micron */ +#define SNOR_MFR_ISSI CFI_MFR_PMC #define SNOR_MFR_MACRONIX CFI_MFR_MACRONIX #define SNOR_MFR_SPANSION CFI_MFR_AMD #define SNOR_MFR_SST CFI_MFR_SST