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[209.85.220.65]) by mx.google.com with SMTPS id x18sor536422ybm.56.2020.04.20.05.09.36 for (Google Transport Security); Mon, 20 Apr 2020 05:09:36 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a63:87c2:: with SMTP id i185mr15807306pge.312.1587384575772; Mon, 20 Apr 2020 05:09:35 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:7ddc:e17b:a9b3:404]) by smtp.gmail.com with ESMTPSA id o187sm920556pfb.12.2020.04.20.05.09.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Apr 2020 05:09:35 -0700 (PDT) From: Jagan Teki To: Vignesh R , u-boot@lists.denx.de Cc: suneelglinux@gmail.com, sagar.kadam@sifive.com, bhargavshah1988@gmail.com, sjg@chromium.org, Bin Meng , trini@konsulko.com, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH 1/3] spi: spi-mem: Xfer opcode alone for non spi-mem Date: Mon, 20 Apr 2020 17:39:19 +0530 Message-Id: <20200420120921.12840-2-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200420120921.12840-1-jagan@amarulasolutions.com> References: <20200420120921.12840-1-jagan@amarulasolutions.com> X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=i18KeMYt; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Some of the SPI controllers have a special set of format registers that defines how the transfer initiated to the FIFO by means of I/O protocol lines. Each mode of transfer from slave would be required to configure the I/O protocol lines so-that the master would identify how many number I/O protocol lines were used and alter the protocol bits on the controller. If a particular transfer combined opcode and address together, then it would be difficult for the master to identify how many I/O protocol lines are being used for opcode and address separately. For example a transfer of SNOR_1_4_4 is not possible to identify the master that how many I/O protocol lines by spi-nor if that particular transfer initites the single xfer for both opcode and address. To address this issue (on these kind of SPI controllers) this patch is trying to send the opcode alone as both opcode and address send together in current code. On the performance note there is no significant issue on the transfer rate for adding this opcode xfer separately. Sample test on 32MiB flash used in SiFive platform with PP and RF opcodes. With existing code: => sf update 0x90000000 0x0 0x2000000 device 0 whole chip 33554432 bytes written, 0 bytes skipped in 543.795s, speed 63191 B/s With opcode alone xfer: => sf update 0x90000000 0x0 0x2000000 device 0 whole chip 33554432 bytes written, 0 bytes skipped in 541.739s, speed 63429 B/s Signed-off-by: Suneel Garapati Signed-off-by: Jagan Teki --- drivers/spi/spi-mem.c | 63 ++++++++++++++++++++++++++----------------- 1 file changed, 38 insertions(+), 25 deletions(-) diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c index e900c997bd..7f4039e856 100644 --- a/drivers/spi/spi-mem.c +++ b/drivers/spi/spi-mem.c @@ -336,15 +336,18 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op) if (msg.actual_length != totalxferlen) return -EIO; #else + u8 opcode = op->cmd.opcode; - if (op->data.nbytes) { - if (op->data.dir == SPI_MEM_DATA_IN) - rx_buf = op->data.buf.in; - else - tx_buf = op->data.buf.out; - } + flag = SPI_XFER_BEGIN; + if (!op->addr.nbytes && !op->dummy.nbytes && !op->data.nbytes) + flag |= SPI_XFER_END; - op_len = sizeof(op->cmd.opcode) + op->addr.nbytes + op->dummy.nbytes; + /* send the opcode */ + ret = spi_xfer(slave, 8, (void *)&opcode, NULL, flag); + if (ret < 0) { + dev_err(slave->dev, "failed to xfer opcode\n"); + return ret; + } /* * Avoid using malloc() here so that we can use this code in SPL where @@ -355,41 +358,51 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op) * data being sent, only the op-code and address. In fact, it should be * possible to just use a small fixed value here instead of op_len. */ + op_len = op->addr.nbytes + op->dummy.nbytes; u8 op_buf[op_len]; - op_buf[pos++] = op->cmd.opcode; - + /* send the addr + dummy */ if (op->addr.nbytes) { + /* fill address */ for (i = 0; i < op->addr.nbytes; i++) op_buf[pos + i] = op->addr.val >> (8 * (op->addr.nbytes - i - 1)); pos += op->addr.nbytes; - } - if (op->dummy.nbytes) - memset(op_buf + pos, 0xff, op->dummy.nbytes); + /* fill dummy */ + if (op->dummy.nbytes) + memset(op_buf + pos, 0xff, op->dummy.nbytes); - /* 1st transfer: opcode + address + dummy cycles */ - flag = SPI_XFER_BEGIN; - /* Make sure to set END bit if no tx or rx data messages follow */ - if (!tx_buf && !rx_buf) - flag |= SPI_XFER_END; + /* make sure to set end flag, if no data bytes */ + if (!op->data.nbytes) + flag |= SPI_XFER_END; - ret = spi_xfer(slave, op_len * 8, op_buf, NULL, flag); - if (ret) - return ret; + ret = spi_xfer(slave, op_len * 8, op_buf, NULL, flag); + if (ret < 0) { + dev_err(slave->dev, "failed to xfer addr + dummy\n"); + return ret; + } + } - /* 2nd transfer: rx or tx data path */ - if (tx_buf || rx_buf) { - ret = spi_xfer(slave, op->data.nbytes * 8, tx_buf, - rx_buf, SPI_XFER_END); - if (ret) + /* send/received the data */ + if (op->data.nbytes) { + if (op->data.dir == SPI_MEM_DATA_IN) + rx_buf = op->data.buf.in; + else + tx_buf = op->data.buf.out; + + ret = spi_xfer(slave, op->data.nbytes * 8, tx_buf, rx_buf, + SPI_XFER_END); + if (ret) { + dev_err(slave->dev, "failed to xfer data\n"); return ret; + } } spi_release_bus(slave); + debug("%02x ", op->cmd.opcode); for (i = 0; i < pos; i++) debug("%02x ", op_buf[i]); debug("| [%dB %s] ",