From patchwork Thu Apr 23 17:00:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1102 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pl1-f199.google.com (mail-pl1-f199.google.com [209.85.214.199]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 38BB041496 for ; Thu, 23 Apr 2020 19:01:15 +0200 (CEST) Received: by mail-pl1-f199.google.com with SMTP id y12sf5093658plk.23 for ; Thu, 23 Apr 2020 10:01:15 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1587661273; cv=pass; d=google.com; s=arc-20160816; b=Lxk2uG0c4KT/YipyaLn+P0kfnq1dvlXUia+2Mw+fTMJbemJOSXcZyZOBAeoVsaq0Cm 7+pO8hkh/CtfhsLlj8UD5DEagoNwd1FbsdWawWm4DLT6Al+szzBpiRgOhDwCr3h20VnK udTA+E8CzKD8f4FM/dUfT0IIOUflWWhjdeQT8j5LIqXedN9FcIskvY1tosiUkXGnPFDU S4pglTwzXOG0Tdy/SrDPOR1loZ5yUUuNLY4ubZe3ToGtgj2GMycwdBIlWFN694ipgSqX DBhKgAHqmpt+ICFQSlDJiDr/pP4DoBm2pv/CXit6vJrijuM2WMCHCLns1waDh282uoqb BKHg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:references:in-reply-to:message-id:date :subject:cc:to:from:mime-version:dkim-signature; bh=q42jL4TAc4RtezyiarqHT/9v+VzcKjQCRHZ8mrDgUBI=; b=0oHYUrPcXUC54+k+oqwP2XZIo6npLFgldZtqnP8NzLVUfzuEES7E8nfFUilB5IDILh lvSITYBQtAQvnhXeMhWe7gqNmjvB3k4cm3OTs1oxTS7fzbfHZ9YtmAz4YROEZ3Ti6xZm dGJM7gAvEPdozU7SwnO2LqHPpYqaUC/P90c/B7Ra1bI5fxb4lIv40QUSEq9kqF1W8+20 dlHLPPWJzLsJUBGkpRN9dbfwhyLwaMV+vhky7/zYbfgIBOmVKYFW86qyhacGiGuj8xaD Rn8a29bRwbwjY7+VJasMf2pguy/KaKweAtybkJAr5uqiQVtC3OMNxmrUEX8gQAGwBnGX wEJA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=U1qF3hFm; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=mime-version:from:to:cc:subject:date:message-id:in-reply-to :references:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=q42jL4TAc4RtezyiarqHT/9v+VzcKjQCRHZ8mrDgUBI=; b=pbhFzOJjxvF/KJ0K5JCPUDqfYfUKfrUtMEpwkHehLwaFMoCZdVDNgS1J4rkxEvc3qg 4Az9ju8IECQdHrz3l6nvsIO8nDwYeksA48EvtshyAv8DmRYV+MotVH//o/u/xDcyOLwi 6qpCjRyPHsSIDUndRcPRiTpQqEhy00DgYHuVE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:to:cc:subject:date:message-id :in-reply-to:references:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=q42jL4TAc4RtezyiarqHT/9v+VzcKjQCRHZ8mrDgUBI=; b=FiQ/VhNc/hpwv5i+5KGoL4VmpTqSTq6fSBxwTS7DPk/TGRHdbZsM7kulTYO6pGexg/ Ch5fKsF1oL9btH2HOQikc1YbdYdbFjwIy+FD6UCiB27x9fUD7B5IMcwchnKypsbmFpdM /tt4eiyOODE3aloARs0CYECpfoHuNmCvoskCfxxyL+QZjgUhk3+TFQ2woqJIzW4ghAC4 R1qdRaluP2kCwAWZEqZ4KZbbo6BzUGnPzi7Le2bEpyla/G0twMrcTNlxElGtDq3x9dI0 yPwMC9X0JnuQ4T2s2ZOgIx8sSlU/A0QyyM/BqQCWEXFVlK6QMMAPEns2caVQAaARXUFs nRug== X-Gm-Message-State: AGi0Pua48QMysW3mNEGD7T+X8IgsZGJ+SUU/PqkLBBCCw/Lq050zVy6S 5Bw+lSbZ0cKRbk/wkTYYm+vBEvM7 X-Google-Smtp-Source: APiQypIZXsrYrlzlvqPr9pjlRAfodEk6DbMMsjh8vU2KA277wVLTdhjI2DCxuuG7jFSvrH8JA08kbQ== X-Received: by 2002:a17:90a:a113:: with SMTP id s19mr1698293pjp.161.1587661272991; Thu, 23 Apr 2020 10:01:12 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a17:902:b58d:: with SMTP id a13ls3634086pls.0.gmail; Thu, 23 Apr 2020 10:01:12 -0700 (PDT) X-Received: by 2002:a17:902:7886:: with SMTP id q6mr4682012pll.237.1587661272302; Thu, 23 Apr 2020 10:01:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1587661272; cv=none; d=google.com; s=arc-20160816; b=SYd+3Y15L9rB4Gv/nXunsFDKZPYmR2T7f/CIQ6Cy62iKESk1/2U1iXu9bAsy5FPVcY tt4NKN2/ltzwSunhkrhSXSW0NR/FSpuvmKOi9h6bfdILVmIgBYzq3sKvVQL+BwQ1D0De iH0oabTGn3BibyjlTpu8yZ3mzaYXqPpy5EvTQJnXh4tny0UGrIPWQSBq0F8VrZ08zeuS 6aLbQ143tFrAOyuz6a1q8XW3G23AqewzUDvFPmRGFj65GtqBpWi+lHX3ryty16m9oULD WHocp5usNbPcTikbm4uYNNDMD7cqKTlSqlIQ1RqKSs6KR+jAUGPg6iImH7F4W+qfNm6b J28A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=LcwJfM3Q1vrrYUHu5ApI5aVGmdOtHzLucx1YE7tfUB4=; b=b3/YKDoEgwUv71NO9U3I5YvzAY7J699SjvmXnQ7zSvijU1m39MaCvRlmfWZcKkzC9T 4hkrCQQYD8toIVIR2b63cDWj9QMs83bgHNS9ksvkSnw4wAIaR9xiVtOX3fYmnxLrIpb2 mO31pMhMqqSPXj5T2mT1R0iUm9UZy0a7yg1TkgFIzC50UgPoMUtxx7SaM1FMlxOqXHZF TN36UjGVfr91uR8FZXEtwmuhUSYW7qxXYs90gcFCInJPoaLwwCv3jeTXGQI/1rlo9VYG MR/4IQvzOWRvEhu+lKRmf9L/auiAZK9XN00/fuZFfE3rghHjHvL80VsYHGWpc5PiNdH1 Ct2w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=U1qF3hFm; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. [209.85.220.65]) by mx.google.com with SMTPS id z21sor4022114pjr.26.2020.04.23.10.01.11 for (Google Transport Security); Thu, 23 Apr 2020 10:01:11 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:90a:1503:: with SMTP id l3mr1610964pja.87.1587661271121; Thu, 23 Apr 2020 10:01:11 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:587e:69d7:8a4e:a122]) by smtp.gmail.com with ESMTPSA id w2sm3084146pfc.194.2020.04.23.10.01.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Apr 2020 10:01:10 -0700 (PDT) From: Jagan Teki To: u-boot@lists.denx.de Cc: Rick Chen , Bin Meng , Bhargav Shah , Sagar Shrikant Kadam , linux-amarula@amarulasolutions.com, Jagan Teki , Vignesh R Subject: [PATCH v4 1/5] spi: sifive: Add spi-mem exec op Date: Thu, 23 Apr 2020 22:30:53 +0530 Message-Id: <20200423170057.1976-2-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200423170057.1976-1-jagan@amarulasolutions.com> References: <20200423170057.1976-1-jagan@amarulasolutions.com> X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=U1qF3hFm; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , SiFive SPI controller is responsible to handle the slave devices like mmc spi and spi nor flash. The controller is designed such a way that it would handle the slave transactions based on the I/O protocol numbers, example if spi nor slave send quad write opcode it has to send alone with I/O protocol number of 4 and if it try to send data it has to send I/O protocol number along with 4 line data. But the current spi-xfer code from spi-mem is combining the opcode and address in a single transaction, so the SPI controller will be unable to identify the I/O protocol number of opcode vs address. So, add the spi-mem exec_op with spi-xfer of opcode, address and data as a separate transaction. This doesn't remove the .xfer of dm_spi_ops since mmc spi will make use of it. Note: This code might have moved to the spi-mem core area once we have done the dedicated tests on other controllers and have real reason to move. Cc: Vignesh R Signed-off-by: Jagan Teki --- Changes for v4: - new patch drivers/spi/spi-sifive.c | 75 +++++++++++++++++++++++++++++++++++++++- 1 file changed, 74 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-sifive.c b/drivers/spi/spi-sifive.c index 8f5efb51a3..5e612edcff 100644 --- a/drivers/spi/spi-sifive.c +++ b/drivers/spi/spi-sifive.c @@ -8,8 +8,9 @@ #include #include +#include #include -#include +#include #include #include #include @@ -241,6 +242,73 @@ static int sifive_spi_xfer(struct udevice *dev, unsigned int bitlen, return 0; } +static int sifive_spi_exec_op(struct spi_slave *slave, + const struct spi_mem_op *op) +{ + struct udevice *dev = slave->dev; + unsigned long flags = SPI_XFER_BEGIN; + u8 opcode = op->cmd.opcode; + unsigned int pos = 0; + const void *tx_buf = NULL; + void *rx_buf = NULL; + int op_len, i; + int ret; + + if (!op->addr.nbytes && !op->dummy.nbytes && !op->data.nbytes) + flags |= SPI_XFER_END; + + /* send the opcode */ + ret = sifive_spi_xfer(dev, 8, (void *)&opcode, NULL, flags); + if (ret < 0) { + dev_err(dev, "failed to xfer opcode\n"); + return ret; + } + + op_len = op->addr.nbytes + op->dummy.nbytes; + u8 op_buf[op_len]; + + /* send the addr + dummy */ + if (op->addr.nbytes) { + /* fill address */ + for (i = 0; i < op->addr.nbytes; i++) + op_buf[pos + i] = op->addr.val >> + (8 * (op->addr.nbytes - i - 1)); + + pos += op->addr.nbytes; + + /* fill dummy */ + if (op->dummy.nbytes) + memset(op_buf + pos, 0xff, op->dummy.nbytes); + + /* make sure to set end flag, if no data bytes */ + if (!op->data.nbytes) + flags |= SPI_XFER_END; + + ret = sifive_spi_xfer(dev, op_len * 8, op_buf, NULL, flags); + if (ret < 0) { + dev_err(dev, "failed to xfer addr + dummy\n"); + return ret; + } + } + + /* send/received the data */ + if (op->data.nbytes) { + if (op->data.dir == SPI_MEM_DATA_IN) + rx_buf = op->data.buf.in; + else + tx_buf = op->data.buf.out; + + ret = sifive_spi_xfer(dev, op->data.nbytes * 8, + tx_buf, rx_buf, SPI_XFER_END); + if (ret) { + dev_err(dev, "failed to xfer data\n"); + return ret; + } + } + + return 0; +} + static int sifive_spi_set_speed(struct udevice *bus, uint speed) { struct sifive_spi *spi = dev_get_priv(bus); @@ -348,11 +416,16 @@ static int sifive_spi_probe(struct udevice *bus) return 0; } +static const struct spi_controller_mem_ops sifive_spi_mem_ops = { + .exec_op = sifive_spi_exec_op, +}; + static const struct dm_spi_ops sifive_spi_ops = { .xfer = sifive_spi_xfer, .set_speed = sifive_spi_set_speed, .set_mode = sifive_spi_set_mode, .cs_info = sifive_spi_cs_info, + .mem_ops = &sifive_spi_mem_ops, }; static const struct udevice_id sifive_spi_ids[] = {