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[209.85.220.65]) by mx.google.com with SMTPS id n37sor5968645pjc.1.2020.05.06.00.50.56 for (Google Transport Security); Wed, 06 May 2020 00:50:56 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:90a:e00c:: with SMTP id u12mr7486915pjy.167.1588751456586; Wed, 06 May 2020 00:50:56 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:c598:8eeb:af7:7f36]) by smtp.gmail.com with ESMTPSA id y186sm1011133pfy.66.2020.05.06.00.50.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 May 2020 00:50:55 -0700 (PDT) From: Jagan Teki To: kever.yang@rock-chips.com, philipp.tomsich@theobroma-systems.com, Simon Glass , Frank Wang , wmc@rock-chips.com, chenjh@rock-chips.com, heiko@sntech.de Cc: u-boot@lists.denx.de, linux-rockchip@lists.infradead.org, Belisko Marek , linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH v2 3/7] clk: rk3399: Enable/Disable TCPHY clocks Date: Wed, 6 May 2020 13:20:21 +0530 Message-Id: <20200506075025.1677-4-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200506075025.1677-1-jagan@amarulasolutions.com> References: <20200506075025.1677-1-jagan@amarulasolutions.com> X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=Ue2tPDCT; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Enable/Disable TCPHY clock for rk3399 platform. Signed-off-by: Jagan Teki --- Changes for v2: - new patch drivers/clk/rockchip/clk_rk3399.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index 4d48f70685..2cd3fd3e68 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -1144,6 +1144,18 @@ static int rk3399_clk_enable(struct clk *clk) case HCLK_HOST1_ARB: rk_clrreg(&priv->cru->clksel_con[20], BIT(8)); break; + case SCLK_UPHY0_TCPDPHY_REF: + rk_clrreg(&priv->cru->clkgate_con[13], BIT(4)); + break; + case SCLK_UPHY0_TCPDCORE: + rk_clrreg(&priv->cru->clkgate_con[13], BIT(5)); + break; + case SCLK_UPHY1_TCPDPHY_REF: + rk_clrreg(&priv->cru->clkgate_con[13], BIT(6)); + break; + case SCLK_UPHY1_TCPDCORE: + rk_clrreg(&priv->cru->clkgate_con[13], BIT(7)); + break; case SCLK_PCIEPHY_REF: rk_clrreg(&priv->cru->clksel_con[18], BIT(10)); break; @@ -1226,6 +1238,18 @@ static int rk3399_clk_disable(struct clk *clk) case HCLK_HOST1_ARB: rk_setreg(&priv->cru->clksel_con[20], BIT(8)); break; + case SCLK_UPHY0_TCPDPHY_REF: + rk_clrreg(&priv->cru->clkgate_con[13], BIT(4)); + break; + case SCLK_UPHY0_TCPDCORE: + rk_setreg(&priv->cru->clkgate_con[13], BIT(5)); + break; + case SCLK_UPHY1_TCPDPHY_REF: + rk_clrreg(&priv->cru->clkgate_con[13], BIT(6)); + break; + case SCLK_UPHY1_TCPDCORE: + rk_setreg(&priv->cru->clkgate_con[13], BIT(7)); + break; case SCLK_PCIEPHY_REF: rk_clrreg(&priv->cru->clksel_con[18], BIT(10)); break;