From patchwork Tue Nov 13 11:16:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 12 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pf1-f198.google.com (cartago.priv [10.11.12.1]) by cassiopea (Postfix) with ESMTPS id 5214A2E5422 for ; Tue, 13 Nov 2018 12:17:17 +0100 (CET) Received: by mail-pf1-f198.google.com with SMTP id z22-v6sf9324764pfi.0 for ; Tue, 13 Nov 2018 03:17:17 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1542107836; cv=pass; d=google.com; s=arc-20160816; b=lNhngwWVakGjZyiKwyzIsJr7SH+bf6AJB84h6YGCAD2XitqDQWSZ3mMX/0DmVCT3rA TuwP14/KVxbCMNulpRz9Ptq8Uig5Ioo6bfk0hvA/EDWxtCT83ydauwCMwTM5XG0sX67E jYoMmeKZGIu1TCn3ZCdr8vYBw6K4GNg/ubjev+S9gfwLlw643eYHblV44PLUfntWHTC+ L6HNfJtCaSGYf0PICvyUqWLrI1Oa8vz+nNl9A7iMdcKt3sBydzJzPpQN3Gf8Kl97H2Rb mcdxk9Ju9KqRcONIDcjv4UFKH8ntEU07DovMsvgWih4zXfm8OXhjIabMO/qxCvb3OICQ sQIA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=rlpTqVyJlpHFfIEuYuSfPKgTjg+EAGEL37BZe3O0asI=; b=YfB4Wxo8zYhLRoFI6pKvAfSiHqHClDBz4RR353IQ7MVww8ehRIQTzohBjSPsfUkUWb 1I+kN8/IBX6ztnnVFehq3FhGtlEx6bn8hAVi5JIK4RVIMS4iTRPQ+8ZTZTXENtnDrbIs c3dY/Bof4aOMLFRYpMSeFMqspHWUIvo5dJiHoPklUVUytig8h5uSigd3PWtuWF2U7zJ0 SkNKnPCTyJ1Koorhj2tsAw1yvtgP2j/fL8hBSLAaUyCwMMTqi3kwtze3XUvTccIC3w2f PbRnXKy6DOVhI1Y61yQl4qDhT29dcdODypcLiyecaFDx8UpnewiARrrE4qP1SSGiOKiM qaVg== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=Tvk0A1rd; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=rlpTqVyJlpHFfIEuYuSfPKgTjg+EAGEL37BZe3O0asI=; b=mq3c50Ypy14j4pv/IGlmt2fJDbZ4M/UueZLLdXLDNLuDxNG5+1/Rkbc8oURuiFe2qB vPnGXHJaYva3ilhMUk1MGIHfl2w2bljZZoxoOc3ozBS/8S0Yn+pm6Scq7ik1B6ebG/GR oUFa7ebDVKLibOD5Vbe5UUTNgwhdMpLUXWuBo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=rlpTqVyJlpHFfIEuYuSfPKgTjg+EAGEL37BZe3O0asI=; b=M91miz16Lz/XsZnT/T595BE7xxTx59l8C/M0bT05fYW9I/uCe+XOqgnEEBIJkx2jL5 uGcRp89Q7Rq9rBXdtWZOJ5EEtrbCTQPKpvG1HYJbLqCDEGHDN7FP6w6DhQKviAgaKbKu vG2HmO8E/dPk8LZVXCFFHW1f/S0AGxvbjUR8FiQtXOH2UcvVChFj4ahQiqhNyFYsG/8p SAgWV9TMmQaSrwBQC2cdDlXPo/kPGjsMfsG3IbBBJYVXCv5XehhObbm0Uy88TVk2yqTd vokuTeYF89tQ+xABLg6Dw+68HvsI1MV49v+4f15r2ub5YwNQj55C+bAMfSwbMJ5jNmGn x+Sw== X-Gm-Message-State: AGRZ1gJWHJUomV1MtkupKG1/Ue+S7fv029Mzbk6EwjPEyIcHnpsdMJW/ F0EgG+5h9W5plw19FQo/lhyVkbiT X-Google-Smtp-Source: AJdET5f4HCCUZSFi1PmpRcvHnB44Fa15tHt7Ulbn2F4p9R8bXjOd18g974J6Img0Q0MJ3GEiLy4WJQ== X-Received: by 2002:a62:45d0:: with SMTP id n77mr1971074pfi.78.1542107836029; Tue, 13 Nov 2018 03:17:16 -0800 (PST) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a62:ca97:: with SMTP id y23-v6ls4171663pfk.7.gmail; Tue, 13 Nov 2018 03:17:15 -0800 (PST) X-Received: by 2002:a62:7a92:: with SMTP id v140-v6mr4728046pfc.46.1542107835707; Tue, 13 Nov 2018 03:17:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542107835; cv=none; d=google.com; s=arc-20160816; b=HHkk5y2OSna20zon5HzIcAPodl2zhR0QbfJ2DcXc55+XCWiZ2pD9aGQdkqLhHaSIgU 3TYKKV1hcclOYusP1FSBT1tikeLkNJO2B5JbsSi5bPFKtS/BwB5qlxrXwp5IDhrYFRql knu0i+Qdv/N9EZKpBP4Kd9iY8lF97JewT+SLfiBue9JAYkiNue5FhurblPQiHWXCF72D ozFtwwhO+3zUPbgGdUez321E4gn8WhV0+QPP5HyN6kVgsogCIt0f73wrDcbKMIzxteaD c2vlSKw2iFHeLCrdkmRN3/Qde/HLN+sy3KeQPdHDSlbS/LWb3D6lPTgTV+dfu/etpDX8 C5pw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=rlpTqVyJlpHFfIEuYuSfPKgTjg+EAGEL37BZe3O0asI=; b=jDqMRiXYA6kwNEMyrRsBJuySclpAqBr/qupQVP1oeD+sAAC+ppasJTMv1f5I8VGrUs vnJIHJcrws8k4y3/nzzfHWo9Sv5WtedseFsxGKrJe0XRsjkl2QoVs3UJ24syuOwLZlhv HQIrJoxnN2ljtFI8ZpZd3RXnf6uqUZ5yFnmSm62OQHR8F3KA3hymIlLSy59sPe6fn9I9 ClTLbauNOF2tOdxqOVLXn98xKGWPbgi4ofNG5u1wkq2E2OGqmVk9XV//rI7vp/mNHK5m t92jGf/8Vv6h1/XqicRFyYM82hvriYQ0xTj/ID4MxJUQ/raNf3mrNLCROmWMNz0/BtTa fOkQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=Tvk0A1rd; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. [209.85.220.65]) by mx.google.com with SMTPS id z20-v6sor21589910pgv.46.2018.11.13.03.17.15 for (Google Transport Security); Tue, 13 Nov 2018 03:17:15 -0800 (PST) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a63:65c7:: with SMTP id z190mr4375174pgb.249.1542107835284; Tue, 13 Nov 2018 03:17:15 -0800 (PST) Received: from localhost.localdomain ([2401:4900:3670:3f11:bc71:2ef7:4a39:e260]) by smtp.gmail.com with ESMTPSA id 27-v6sm28531377pfm.36.2018.11.13.03.17.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 13 Nov 2018 03:17:14 -0800 (PST) From: Jagan Teki To: Maxime Ripard , Chen-Yu Tsai , Icenowy Zheng , Jernej Skrabec , Vasily Khoruzhick , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , David Airlie , dri-devel@lists.freedesktop.org, Michael Turquette , Stephen Boyd , linux-clk@vger.kernel.org, Michael Trimarchi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, linux-amarula@amarulasolutions.com Cc: Jagan Teki Subject: [PATCH v4 04/26] drm/sun4i: sun6i_mipi_dsi: Add has_mod_clk quirk Date: Tue, 13 Nov 2018 16:46:11 +0530 Message-Id: <20181113111633.20189-5-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181113111633.20189-1-jagan@amarulasolutions.com> References: <20181113111633.20189-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=Tvk0A1rd; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Mod clock is not mandatory for all Allwinner MIPI DSI controllers, it is connected as CLK_DSI_SCLK for A31 and not available in A64. So add has_mod_clk quirk and process the clk accordingly. Signed-off-by: Jagan Teki --- drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 39 ++++++++++++++++++-------- drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h | 5 ++++ 2 files changed, 33 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c index e3b34a345546..561de393ea23 100644 --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -981,6 +982,8 @@ static int sun6i_dsi_probe(struct platform_device *pdev) dsi->host.ops = &sun6i_dsi_host_ops; dsi->host.dev = dev; + dsi->variant = of_device_get_match_data(dev); + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); base = devm_ioremap_resource(dev, res); if (IS_ERR(base)) { @@ -1001,17 +1004,20 @@ static int sun6i_dsi_probe(struct platform_device *pdev) return PTR_ERR(dsi->reset); } - dsi->mod_clk = devm_clk_get(dev, "mod"); - if (IS_ERR(dsi->mod_clk)) { - dev_err(dev, "Couldn't get the DSI mod clock\n"); - return PTR_ERR(dsi->mod_clk); + if (dsi->variant->has_mod_clk) { + dsi->mod_clk = devm_clk_get(dev, "mod"); + if (IS_ERR(dsi->mod_clk)) { + dev_err(dev, "Couldn't get the DSI mod clock\n"); + return PTR_ERR(dsi->mod_clk); + } } /* * In order to operate properly, that clock seems to be always * set to 297MHz. */ - clk_set_rate_exclusive(dsi->mod_clk, 297000000); + if (dsi->variant->has_mod_clk) + clk_set_rate_exclusive(dsi->mod_clk, 297000000); dphy_node = of_parse_phandle(dev->of_node, "phys", 0); ret = sun6i_dphy_probe(dsi, dphy_node); @@ -1043,7 +1049,8 @@ static int sun6i_dsi_probe(struct platform_device *pdev) pm_runtime_disable(dev); sun6i_dphy_remove(dsi); err_unprotect_clk: - clk_rate_exclusive_put(dsi->mod_clk); + if (dsi->variant->has_mod_clk) + clk_rate_exclusive_put(dsi->mod_clk); return ret; } @@ -1056,7 +1063,8 @@ static int sun6i_dsi_remove(struct platform_device *pdev) mipi_dsi_host_unregister(&dsi->host); pm_runtime_disable(dev); sun6i_dphy_remove(dsi); - clk_rate_exclusive_put(dsi->mod_clk); + if (dsi->variant->has_mod_clk) + clk_rate_exclusive_put(dsi->mod_clk); return 0; } @@ -1066,7 +1074,8 @@ static int __maybe_unused sun6i_dsi_runtime_resume(struct device *dev) struct sun6i_dsi *dsi = dev_get_drvdata(dev); reset_control_deassert(dsi->reset); - clk_prepare_enable(dsi->mod_clk); + if (dsi->variant->has_mod_clk) + clk_prepare_enable(dsi->mod_clk); /* * Enable the DSI block. @@ -1094,7 +1103,8 @@ static int __maybe_unused sun6i_dsi_runtime_suspend(struct device *dev) { struct sun6i_dsi *dsi = dev_get_drvdata(dev); - clk_disable_unprepare(dsi->mod_clk); + if (dsi->variant->has_mod_clk) + clk_disable_unprepare(dsi->mod_clk); reset_control_assert(dsi->reset); return 0; @@ -1106,9 +1116,16 @@ static const struct dev_pm_ops sun6i_dsi_pm_ops = { NULL) }; +static const struct sun6i_dsi_variant sun6i_a31_dsi = { + .has_mod_clk = true, +}; + static const struct of_device_id sun6i_dsi_of_table[] = { - { .compatible = "allwinner,sun6i-a31-mipi-dsi" }, - { } + { + .compatible = "allwinner,sun6i-a31-mipi-dsi", + .data = &sun6i_a31_dsi, + }, + { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, sun6i_dsi_of_table); diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h index dbbc5b3ecbda..597b62227019 100644 --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h @@ -20,6 +20,10 @@ struct sun6i_dphy { struct reset_control *reset; }; +struct sun6i_dsi_variant { + bool has_mod_clk; +}; + struct sun6i_dsi { struct drm_connector connector; struct drm_encoder encoder; @@ -35,6 +39,7 @@ struct sun6i_dsi { struct sun4i_drv *drv; struct mipi_dsi_device *device; struct drm_panel *panel; + const struct sun6i_dsi_variant *variant; }; static inline struct sun6i_dsi *host_to_sun6i_dsi(struct mipi_dsi_host *host)