[7/9] spi: mxs: Code cleanup
diff mbox series

Message ID 20200526080430.118262-8-jagan@amarulasolutions.com
State New
Headers show
Series
  • spi: dm-convert and cleanups
Related show

Commit Message

Jagan Teki May 26, 2020, 8:04 a.m. UTC 
Order the macros, private structures and simple functions
in a proper way to have more code readability.

No functionality changed.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 drivers/spi/mxs_spi.c | 37 ++++++++++++++++++-------------------
 1 file changed, 18 insertions(+), 19 deletions(-)

Comments

Jagan Teki June 11, 2020, 8:39 a.m. UTC | #1 
On Tue, May 26, 2020 at 1:34 PM Jagan Teki <jagan@amarulasolutions.com> wrote:
>
> Order the macros, private structures and simple functions
> in a proper way to have more code readability.
>
> No functionality changed.
>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---

Applied to u-boot-spi/master

Patch
diff mbox series 

diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c
index a21419a15a..e231e96e58 100644
--- a/drivers/spi/mxs_spi.c
+++ b/drivers/spi/mxs_spi.c
@@ -13,7 +13,10 @@ 
  */
 
 #include <common.h>
+#include <dm.h>
+#include <dt-structs.h>
 #include <cpu_func.h>
+#include <errno.h>
 #include <log.h>
 #include <malloc.h>
 #include <memalign.h>
@@ -34,21 +37,9 @@ 
 
 #define MXSSSP_SMALL_TRANSFER	512
 
-static void mxs_spi_start_xfer(struct mxs_ssp_regs *ssp_regs)
-{
-	writel(SSP_CTRL0_LOCK_CS, &ssp_regs->hw_ssp_ctrl0_set);
-	writel(SSP_CTRL0_IGNORE_CRC, &ssp_regs->hw_ssp_ctrl0_clr);
-}
-
-static void mxs_spi_end_xfer(struct mxs_ssp_regs *ssp_regs)
-{
-	writel(SSP_CTRL0_LOCK_CS, &ssp_regs->hw_ssp_ctrl0_clr);
-	writel(SSP_CTRL0_IGNORE_CRC, &ssp_regs->hw_ssp_ctrl0_set);
-}
-
-#include <dm.h>
-#include <errno.h>
-#include <dt-structs.h>
+/* Base numbers of i.MX2[38] clk for ssp0 IP block */
+#define MXS_SSP_IMX23_CLKID_SSP0 33
+#define MXS_SSP_IMX28_CLKID_SSP0 46
 
 #ifdef CONFIG_MX28
 #define dtd_fsl_imx_spi dtd_fsl_imx28_spi
@@ -75,6 +66,18 @@  struct mxs_spi_priv {
 	unsigned int mode;
 };
 
+static void mxs_spi_start_xfer(struct mxs_ssp_regs *ssp_regs)
+{
+	writel(SSP_CTRL0_LOCK_CS, &ssp_regs->hw_ssp_ctrl0_set);
+	writel(SSP_CTRL0_IGNORE_CRC, &ssp_regs->hw_ssp_ctrl0_clr);
+}
+
+static void mxs_spi_end_xfer(struct mxs_ssp_regs *ssp_regs)
+{
+	writel(SSP_CTRL0_LOCK_CS, &ssp_regs->hw_ssp_ctrl0_clr);
+	writel(SSP_CTRL0_IGNORE_CRC, &ssp_regs->hw_ssp_ctrl0_set);
+}
+
 static int mxs_spi_xfer_pio(struct mxs_spi_priv *priv,
 			    char *data, int length, int write,
 			    unsigned long flags)
@@ -312,10 +315,6 @@  int mxs_spi_xfer(struct udevice *dev, unsigned int bitlen,
 	}
 }
 
-/* Base numbers of i.MX2[38] clk for ssp0 IP block */
-#define MXS_SSP_IMX23_CLKID_SSP0 33
-#define MXS_SSP_IMX28_CLKID_SSP0 46
-
 static int mxs_spi_probe(struct udevice *bus)
 {
 	struct mxs_spi_platdata *plat = dev_get_platdata(bus);