[v2,11/23] pandora: Drop omap3 pandora

1280 diff mbox series

OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.

Drop it.

Cc: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
Changes for v2:
- CCed board maintainer

 arch/arm/mach-omap2/omap3/Kconfig |   6 -
 board/pandora/Kconfig             |   9 -
 board/pandora/MAINTAINERS         |   6 -
 board/pandora/Makefile            |   6 -
 board/pandora/pandora.c           | 149 ------------
 board/pandora/pandora.h           | 391 ------------------------------
 configs/omap3_pandora_defconfig   |  40 ---
 doc/README.omap3                  |   5 -
 include/configs/omap3_pandora.h   |  62 -----
 9 files changed, 674 deletions(-)
 delete mode 100644 board/pandora/Kconfig
 delete mode 100644 board/pandora/MAINTAINERS
 delete mode 100644 board/pandora/Makefile
 delete mode 100644 board/pandora/pandora.c
 delete mode 100644 board/pandora/pandora.h
 delete mode 100644 configs/omap3_pandora_defconfig
 delete mode 100644 include/configs/omap3_pandora.h

I'm not aware of any remaining mainline u-boot users of this device (also
asked around a bit on IRC), so:
Acked-by: Grazvydas Ignotas <notasas@gmail.com>

Gražvydas


On Wed, May 27, 2020 at 3:57 PM Jagan Teki <jagan@amarulasolutions.com>
wrote:

> OF_CONTROL, DM_SPI and other driver model migration deadlines
> are expired for this board.
>
> Drop it.
>
> Cc: Grazvydas Ignotas <notasas@gmail.com>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
> Changes for v2:
> - CCed board maintainer
>
>  arch/arm/mach-omap2/omap3/Kconfig |   6 -
>  board/pandora/Kconfig             |   9 -
>  board/pandora/MAINTAINERS         |   6 -
>  board/pandora/Makefile            |   6 -
>  board/pandora/pandora.c           | 149 ------------
>  board/pandora/pandora.h           | 391 ------------------------------
>  configs/omap3_pandora_defconfig   |  40 ---
>  doc/README.omap3                  |   5 -
>  include/configs/omap3_pandora.h   |  62 -----
>  9 files changed, 674 deletions(-)
>  delete mode 100644 board/pandora/Kconfig
>  delete mode 100644 board/pandora/MAINTAINERS
>  delete mode 100644 board/pandora/Makefile
>  delete mode 100644 board/pandora/pandora.c
>  delete mode 100644 board/pandora/pandora.h
>  delete mode 100644 configs/omap3_pandora_defconfig
>  delete mode 100644 include/configs/omap3_pandora.h
>
> diff --git a/arch/arm/mach-omap2/omap3/Kconfig
> b/arch/arm/mach-omap2/omap3/Kconfig
> index 306c2596d3..18068be076 100644
> --- a/arch/arm/mach-omap2/omap3/Kconfig
> +++ b/arch/arm/mach-omap2/omap3/Kconfig
> @@ -78,11 +78,6 @@ config TARGET_OMAP3_ZOOM1
>  config TARGET_AM3517_CRANE
>         bool "am3517_crane"
>
> -config TARGET_OMAP3_PANDORA
> -       bool "OMAP3 Pandora"
> -       select OMAP3_GPIO_4
> -       select OMAP3_GPIO_6
> -
>  config TARGET_TRICORDER
>         bool "Tricorder"
>         select OMAP3_GPIO_2
> @@ -161,7 +156,6 @@ source "board/ti/evm/Kconfig"
>  source "board/isee/igep00x0/Kconfig"
>  source "board/logicpd/zoom1/Kconfig"
>  source "board/ti/am3517crane/Kconfig"
> -source "board/pandora/Kconfig"
>  source "board/corscience/tricorder/Kconfig"
>  source "board/logicpd/omap3som/Kconfig"
>  source "board/nokia/rx51/Kconfig"
> diff --git a/board/pandora/Kconfig b/board/pandora/Kconfig
> deleted file mode 100644
> index 0b33818008..0000000000
> --- a/board/pandora/Kconfig
> +++ /dev/null
> @@ -1,9 +0,0 @@
> -if TARGET_OMAP3_PANDORA
> -
> -config SYS_BOARD
> -       default "pandora"
> -
> -config SYS_CONFIG_NAME
> -       default "omap3_pandora"
> -
> -endif
> diff --git a/board/pandora/MAINTAINERS b/board/pandora/MAINTAINERS
> deleted file mode 100644
> index e12351735c..0000000000
> --- a/board/pandora/MAINTAINERS
> +++ /dev/null
> @@ -1,6 +0,0 @@
> -PANDORA BOARD
> -M:     Grazvydas Ignotas <notasas@gmail.com>
> -S:     Maintained
> -F:     board/pandora/
> -F:     include/configs/omap3_pandora.h
> -F:     configs/omap3_pandora_defconfig
> diff --git a/board/pandora/Makefile b/board/pandora/Makefile
> deleted file mode 100644
> index c05c8fb854..0000000000
> --- a/board/pandora/Makefile
> +++ /dev/null
> @@ -1,6 +0,0 @@
> -# SPDX-License-Identifier: GPL-2.0+
> -#
> -# (C) Copyright 2000, 2001, 2002
> -# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
> -
> -obj-y  := pandora.o
> diff --git a/board/pandora/pandora.c b/board/pandora/pandora.c
> deleted file mode 100644
> index a93848666f..0000000000
> --- a/board/pandora/pandora.c
> +++ /dev/null
> @@ -1,149 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0+
> -/*
> - * (C) Copyright 2008
> - * Grazvydas Ignotas <notasas@gmail.com>
> - *
> - * Derived from Beagle Board, 3430 SDP, and OMAP3EVM code by
> - *     Richard Woodruff <r-woodruff2@ti.com>
> - *     Syed Mohammed Khasim <khasim@ti.com>
> - *     Sunil Kumar <sunilsaini05@gmail.com>
> - *     Shashi Ranjan <shashiranjanmca05@gmail.com>
> - *
> - * (C) Copyright 2004-2008
> - * Texas Instruments, <www.ti.com>
> - */
> -#include <common.h>
> -#include <dm.h>
> -#include <init.h>
> -#include <ns16550.h>
> -#include <twl4030.h>
> -#include <asm/io.h>
> -#include <asm/gpio.h>
> -#include <asm/arch/mmc_host_def.h>
> -#include <asm/arch/mux.h>
> -#include <asm/arch/gpio.h>
> -#include <asm/arch/sys_proto.h>
> -#include <asm/mach-types.h>
> -#include <linux/delay.h>
> -#include "pandora.h"
> -
> -DECLARE_GLOBAL_DATA_PTR;
> -
> -#define TWL4030_BB_CFG_BBCHEN          (1 << 4)
> -#define TWL4030_BB_CFG_BBSEL_3200MV    (3 << 2)
> -#define TWL4030_BB_CFG_BBISEL_500UA    2
> -
> -#define CONTROL_WKUP_CTRL              0x48002a5c
> -#define GPIO_IO_PWRDNZ                 (1 << 6)
> -#define PBIASLITEVMODE1                        (1 << 8)
> -
> -static const struct ns16550_platdata pandora_serial = {
> -       .base = OMAP34XX_UART3,
> -       .reg_shift = 2,
> -       .clock = V_NS16550_CLK,
> -       .fcr = UART_FCR_DEFVAL,
> -};
> -
> -U_BOOT_DEVICE(pandora_uart) = {
> -       "ns16550_serial",
> -       &pandora_serial
> -};
> -
> -/*
> - * Routine: board_init
> - * Description: Early hardware init.
> - */
> -int board_init(void)
> -{
> -       gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
> -       /* board id for Linux */
> -       gd->bd->bi_arch_number = MACH_TYPE_OMAP3_PANDORA;
> -       /* boot param addr */
> -       gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
> -
> -       return 0;
> -}
> -
> -static void set_output_gpio(unsigned int gpio, int value)
> -{
> -       int ret;
> -
> -       ret = gpio_request(gpio, "");
> -       if (ret != 0) {
> -               printf("could not request GPIO %u\n", gpio);
> -               return;
> -       }
> -       ret = gpio_direction_output(gpio, value);
> -       if (ret != 0)
> -               printf("could not set GPIO %u to %d\n", gpio, value);
> -}
> -
> -/*
> - * Routine: misc_init_r
> - * Description: Configure board specific parts
> - */
> -int misc_init_r(void)
> -{
> -       t2_t *t2_base = (t2_t *)T2_BASE;
> -       u32 pbias_lite;
> -
> -       twl4030_led_init(TWL4030_LED_LEDEN_LEDBON);
> -
> -       /* set up dual-voltage GPIOs to 1.8V */
> -       pbias_lite = readl(&t2_base->pbias_lite);
> -       pbias_lite &= ~PBIASLITEVMODE1;
> -       pbias_lite |= PBIASLITEPWRDNZ1;
> -       writel(pbias_lite, &t2_base->pbias_lite);
> -       if (get_cpu_family() == CPU_OMAP36XX)
> -               writel(readl(CONTROL_WKUP_CTRL) | GPIO_IO_PWRDNZ,
> -                       CONTROL_WKUP_CTRL);
> -
> -       /* make sure audio and BT chips are in powerdown state */
> -       set_output_gpio(14, 0);
> -       set_output_gpio(15, 0);
> -       set_output_gpio(118, 0);
> -
> -       /* enable USB supply */
> -       set_output_gpio(164, 1);
> -
> -       /* wifi needs a short pulse to enter powersave state */
> -       set_output_gpio(23, 1);
> -       udelay(5000);
> -       gpio_direction_output(23, 0);
> -
> -       /* Enable battery backup capacitor (3.2V, 0.5mA charge current) */
> -       twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
> -               TWL4030_PM_RECEIVER_BB_CFG,
> -               TWL4030_BB_CFG_BBCHEN | TWL4030_BB_CFG_BBSEL_3200MV |
> -               TWL4030_BB_CFG_BBISEL_500UA);
> -
> -       omap_die_id_display();
> -
> -       return 0;
> -}
> -
> -/*
> - * Routine: set_muxconf_regs
> - * Description: Setting up the configuration Mux registers specific to the
> - *             hardware. Many pins need to be moved from protect to
> primary
> - *             mode.
> - */
> -void set_muxconf_regs(void)
> -{
> -       MUX_PANDORA();
> -       if (get_cpu_family() == CPU_OMAP36XX) {
> -               MUX_PANDORA_3730();
> -       }
> -}
> -
> -#ifdef CONFIG_MMC
> -int board_mmc_init(bd_t *bis)
> -{
> -       return omap_mmc_init(0, 0, 0, -1, -1);
> -}
> -
> -void board_mmc_power_init(void)
> -{
> -       twl4030_power_mmc_init(0);
> -}
> -#endif
> diff --git a/board/pandora/pandora.h b/board/pandora/pandora.h
> deleted file mode 100644
> index 9c4c5d1cd7..0000000000
> --- a/board/pandora/pandora.h
> +++ /dev/null
> @@ -1,391 +0,0 @@
> -/* SPDX-License-Identifier: GPL-2.0+ */
> -/*
> - * (C) Copyright 2008
> - * Grazvydas Ignotas <notasas@gmail.com>
> - */
> -#ifndef _PANDORA_H_
> -#define _PANDORA_H_
> -
> -const omap3_sysinfo sysinfo = {
> -       DDR_STACKED,
> -       "OMAP3 Pandora",
> -       "NAND",
> -};
> -
> -/*
> - * IEN  - Input Enable
> - * IDIS - Input Disable
> - * PTD  - Pull type Down
> - * PTU  - Pull type Up
> - * DIS  - Pull type selection is inactive
> - * EN  - Pull type selection is active
> - * M0  - Mode 0
> - * The commented string gives the final mux configuration for that pin
> - */
> -#define MUX_PANDORA() \
> - /*SDRC*/\
> -       MUX_VAL(CP(SDRC_D0),            (IEN  | PTD | DIS | M0))
> /*SDRC_D0*/\
> -       MUX_VAL(CP(SDRC_D1),            (IEN  | PTD | DIS | M0))
> /*SDRC_D1*/\
> -       MUX_VAL(CP(SDRC_D2),            (IEN  | PTD | DIS | M0))
> /*SDRC_D2*/\
> -       MUX_VAL(CP(SDRC_D3),            (IEN  | PTD | DIS | M0))
> /*SDRC_D3*/\
> -       MUX_VAL(CP(SDRC_D4),            (IEN  | PTD | DIS | M0))
> /*SDRC_D4*/\
> -       MUX_VAL(CP(SDRC_D5),            (IEN  | PTD | DIS | M0))
> /*SDRC_D5*/\
> -       MUX_VAL(CP(SDRC_D6),            (IEN  | PTD | DIS | M0))
> /*SDRC_D6*/\
> -       MUX_VAL(CP(SDRC_D7),            (IEN  | PTD | DIS | M0))
> /*SDRC_D7*/\
> -       MUX_VAL(CP(SDRC_D8),            (IEN  | PTD | DIS | M0))
> /*SDRC_D8*/\
> -       MUX_VAL(CP(SDRC_D9),            (IEN  | PTD | DIS | M0))
> /*SDRC_D9*/\
> -       MUX_VAL(CP(SDRC_D10),           (IEN  | PTD | DIS | M0))
> /*SDRC_D10*/\
> -       MUX_VAL(CP(SDRC_D11),           (IEN  | PTD | DIS | M0))
> /*SDRC_D11*/\
> -       MUX_VAL(CP(SDRC_D12),           (IEN  | PTD | DIS | M0))
> /*SDRC_D12*/\
> -       MUX_VAL(CP(SDRC_D13),           (IEN  | PTD | DIS | M0))
> /*SDRC_D13*/\
> -       MUX_VAL(CP(SDRC_D14),           (IEN  | PTD | DIS | M0))
> /*SDRC_D14*/\
> -       MUX_VAL(CP(SDRC_D15),           (IEN  | PTD | DIS | M0))
> /*SDRC_D15*/\
> -       MUX_VAL(CP(SDRC_D16),           (IEN  | PTD | DIS | M0))
> /*SDRC_D16*/\
> -       MUX_VAL(CP(SDRC_D17),           (IEN  | PTD | DIS | M0))
> /*SDRC_D17*/\
> -       MUX_VAL(CP(SDRC_D18),           (IEN  | PTD | DIS | M0))
> /*SDRC_D18*/\
> -       MUX_VAL(CP(SDRC_D19),           (IEN  | PTD | DIS | M0))
> /*SDRC_D19*/\
> -       MUX_VAL(CP(SDRC_D20),           (IEN  | PTD | DIS | M0))
> /*SDRC_D20*/\
> -       MUX_VAL(CP(SDRC_D21),           (IEN  | PTD | DIS | M0))
> /*SDRC_D21*/\
> -       MUX_VAL(CP(SDRC_D22),           (IEN  | PTD | DIS | M0))
> /*SDRC_D22*/\
> -       MUX_VAL(CP(SDRC_D23),           (IEN  | PTD | DIS | M0))
> /*SDRC_D23*/\
> -       MUX_VAL(CP(SDRC_D24),           (IEN  | PTD | DIS | M0))
> /*SDRC_D24*/\
> -       MUX_VAL(CP(SDRC_D25),           (IEN  | PTD | DIS | M0))
> /*SDRC_D25*/\
> -       MUX_VAL(CP(SDRC_D26),           (IEN  | PTD | DIS | M0))
> /*SDRC_D26*/\
> -       MUX_VAL(CP(SDRC_D27),           (IEN  | PTD | DIS | M0))
> /*SDRC_D27*/\
> -       MUX_VAL(CP(SDRC_D28),           (IEN  | PTD | DIS | M0))
> /*SDRC_D28*/\
> -       MUX_VAL(CP(SDRC_D29),           (IEN  | PTD | DIS | M0))
> /*SDRC_D29*/\
> -       MUX_VAL(CP(SDRC_D30),           (IEN  | PTD | DIS | M0))
> /*SDRC_D30*/\
> -       MUX_VAL(CP(SDRC_D31),           (IEN  | PTD | DIS | M0))
> /*SDRC_D31*/\
> -       MUX_VAL(CP(SDRC_CLK),           (IEN  | PTD | DIS | M0))
> /*SDRC_CLK*/\
> -       MUX_VAL(CP(SDRC_DQS0),          (IEN  | PTD | DIS | M0))
> /*SDRC_DQS0*/\
> -       MUX_VAL(CP(SDRC_DQS1),          (IEN  | PTD | DIS | M0))
> /*SDRC_DQS1*/\
> -       MUX_VAL(CP(SDRC_DQS2),          (IEN  | PTD | DIS | M0))
> /*SDRC_DQS2*/\
> -       MUX_VAL(CP(SDRC_DQS3),          (IEN  | PTD | DIS | M0))
> /*SDRC_DQS3*/\
> - /*GPMC*/\
> -       MUX_VAL(CP(GPMC_A1),            (IDIS | PTD | DIS | M0))
> /*GPMC_A1*/\
> -       MUX_VAL(CP(GPMC_A2),            (IDIS | PTD | DIS | M0))
> /*GPMC_A2*/\
> -       MUX_VAL(CP(GPMC_A3),            (IDIS | PTD | DIS | M0))
> /*GPMC_A3*/\
> -       MUX_VAL(CP(GPMC_A4),            (IDIS | PTD | DIS | M0))
> /*GPMC_A4*/\
> -       MUX_VAL(CP(GPMC_A5),            (IDIS | PTD | DIS | M0))
> /*GPMC_A5*/\
> -       MUX_VAL(CP(GPMC_A6),            (IDIS | PTD | DIS | M0))
> /*GPMC_A6*/\
> -       MUX_VAL(CP(GPMC_A7),            (IDIS | PTD | DIS | M0))
> /*GPMC_A7*/\
> -       MUX_VAL(CP(GPMC_A8),            (IDIS | PTD | DIS | M0))
> /*GPMC_A8*/\
> -       MUX_VAL(CP(GPMC_A9),            (IDIS | PTD | DIS | M0))
> /*GPMC_A9*/\
> -       MUX_VAL(CP(GPMC_A10),           (IDIS | PTD | DIS | M0))
> /*GPMC_A10*/\
> -       MUX_VAL(CP(GPMC_D0),            (IEN  | PTD | DIS | M0))
> /*GPMC_D0*/\
> -       MUX_VAL(CP(GPMC_D1),            (IEN  | PTD | DIS | M0))
> /*GPMC_D1*/\
> -       MUX_VAL(CP(GPMC_D2),            (IEN  | PTD | DIS | M0))
> /*GPMC_D2*/\
> -       MUX_VAL(CP(GPMC_D3),            (IEN  | PTD | DIS | M0))
> /*GPMC_D3*/\
> -       MUX_VAL(CP(GPMC_D4),            (IEN  | PTD | DIS | M0))
> /*GPMC_D4*/\
> -       MUX_VAL(CP(GPMC_D5),            (IEN  | PTD | DIS | M0))
> /*GPMC_D5*/\
> -       MUX_VAL(CP(GPMC_D6),            (IEN  | PTD | DIS | M0))
> /*GPMC_D6*/\
> -       MUX_VAL(CP(GPMC_D7),            (IEN  | PTD | DIS | M0))
> /*GPMC_D7*/\
> -       MUX_VAL(CP(GPMC_D8),            (IEN  | PTD | DIS | M0))
> /*GPMC_D8*/\
> -       MUX_VAL(CP(GPMC_D9),            (IEN  | PTD | DIS | M0))
> /*GPMC_D9*/\
> -       MUX_VAL(CP(GPMC_D10),           (IEN  | PTD | DIS | M0))
> /*GPMC_D10*/\
> -       MUX_VAL(CP(GPMC_D11),           (IEN  | PTD | DIS | M0))
> /*GPMC_D11*/\
> -       MUX_VAL(CP(GPMC_D12),           (IEN  | PTD | DIS | M0))
> /*GPMC_D12*/\
> -       MUX_VAL(CP(GPMC_D13),           (IEN  | PTD | DIS | M0))
> /*GPMC_D13*/\
> -       MUX_VAL(CP(GPMC_D14),           (IEN  | PTD | DIS | M0))
> /*GPMC_D14*/\
> -       MUX_VAL(CP(GPMC_D15),           (IEN  | PTD | DIS | M0))
> /*GPMC_D15*/\
> -       MUX_VAL(CP(GPMC_NCS0),          (IDIS | PTU | EN  | M0))
> /*GPMC_nCS0*/\
> -       MUX_VAL(CP(GPMC_NCS1),          (IDIS | PTU | EN  | M0))
> /*GPMC_nCS1*/\
> -       MUX_VAL(CP(GPMC_CLK),           (IDIS | PTD | DIS | M0))
> /*GPMC_CLK*/\
> -       MUX_VAL(CP(GPMC_NADV_ALE),      (IDIS | PTD | DIS | M0))
> /*GPMC_nADV_ALE*/\
> -       MUX_VAL(CP(GPMC_NOE),           (IDIS | PTD | DIS | M0))
> /*GPMC_nOE*/\
> -       MUX_VAL(CP(GPMC_NWE),           (IDIS | PTD | DIS | M0))
> /*GPMC_nWE*/\
> -       MUX_VAL(CP(GPMC_NBE0_CLE),      (IDIS | PTD | DIS | M0))
> /*GPMC_nBE0_CLE*/\
> -       MUX_VAL(CP(GPMC_NWP),           (IEN  | PTD | DIS | M0))
> /*GPMC_nWP*/\
> -       MUX_VAL(CP(GPMC_WAIT0),         (IEN  | PTU | EN  | M0))
> /*GPMC_WAIT0*/\
> -       MUX_VAL(CP(GPMC_WAIT1),         (IEN  | PTU | EN  | M0))
> /*GPMC_WAIT1*/\
> - /*DSS*/\
> -       MUX_VAL(CP(DSS_PCLK),           (IDIS | PTD | DIS | M0))
> /*DSS_PCLK*/\
> -       MUX_VAL(CP(DSS_HSYNC),          (IDIS | PTD | DIS | M0))
> /*DSS_HSYNC*/\
> -       MUX_VAL(CP(DSS_VSYNC),          (IDIS | PTD | DIS | M0))
> /*DSS_VSYNC*/\
> -       MUX_VAL(CP(DSS_ACBIAS),         (IDIS | PTD | DIS | M0))
> /*DSS_ACBIAS*/\
> -       MUX_VAL(CP(DSS_DATA0),          (IDIS | PTD | DIS | M0))
> /*DSS_DATA0*/\
> -       MUX_VAL(CP(DSS_DATA1),          (IDIS | PTD | DIS | M0))
> /*DSS_DATA1*/\
> -       MUX_VAL(CP(DSS_DATA2),          (IDIS | PTD | DIS | M0))
> /*DSS_DATA2*/\
> -       MUX_VAL(CP(DSS_DATA3),          (IDIS | PTD | DIS | M0))
> /*DSS_DATA3*/\
> -       MUX_VAL(CP(DSS_DATA4),          (IDIS | PTD | DIS | M0))
> /*DSS_DATA4*/\
> -       MUX_VAL(CP(DSS_DATA5),          (IDIS | PTD | DIS | M0))
> /*DSS_DATA5*/\
> -       MUX_VAL(CP(DSS_DATA6),          (IDIS | PTD | DIS | M0))
> /*DSS_DATA6*/\
> -       MUX_VAL(CP(DSS_DATA7),          (IDIS | PTD | DIS | M0))
> /*DSS_DATA7*/\
> -       MUX_VAL(CP(DSS_DATA8),          (IDIS | PTD | DIS | M0))
> /*DSS_DATA8*/\
> -       MUX_VAL(CP(DSS_DATA9),          (IDIS | PTD | DIS | M0))
> /*DSS_DATA9*/\
> -       MUX_VAL(CP(DSS_DATA10),         (IDIS | PTD | DIS | M0))
> /*DSS_DATA10*/\
> -       MUX_VAL(CP(DSS_DATA11),         (IDIS | PTD | DIS | M0))
> /*DSS_DATA11*/\
> -       MUX_VAL(CP(DSS_DATA12),         (IDIS | PTD | DIS | M0))
> /*DSS_DATA12*/\
> -       MUX_VAL(CP(DSS_DATA13),         (IDIS | PTD | DIS | M0))
> /*DSS_DATA13*/\
> -       MUX_VAL(CP(DSS_DATA14),         (IDIS | PTD | DIS | M0))
> /*DSS_DATA14*/\
> -       MUX_VAL(CP(DSS_DATA15),         (IDIS | PTD | DIS | M0))
> /*DSS_DATA15*/\
> -       MUX_VAL(CP(DSS_DATA16),         (IDIS | PTD | DIS | M0))
> /*DSS_DATA16*/\
> -       MUX_VAL(CP(DSS_DATA17),         (IDIS | PTD | DIS | M0))
> /*DSS_DATA17*/\
> -       MUX_VAL(CP(DSS_DATA18),         (IDIS | PTD | DIS | M0))
> /*DSS_DATA18*/\
> -       MUX_VAL(CP(DSS_DATA19),         (IDIS | PTD | DIS | M0))
> /*DSS_DATA19*/\
> -       MUX_VAL(CP(DSS_DATA20),         (IDIS | PTD | DIS | M0))
> /*DSS_DATA20*/\
> -       MUX_VAL(CP(DSS_DATA21),         (IDIS | PTD | DIS | M0))
> /*DSS_DATA21*/\
> -       MUX_VAL(CP(DSS_DATA22),         (IDIS | PTD | DIS | M0))
> /*DSS_DATA22*/\
> -       MUX_VAL(CP(DSS_DATA23),         (IDIS | PTD | DIS | M0))
> /*DSS_DATA23*/\
> - /*GPIO based game buttons*/\
> -       MUX_VAL(CP(CAM_XCLKA),          (IEN  | PTD | DIS | M4)) /*GPIO_96
> - LEFT*/\
> -       MUX_VAL(CP(CAM_PCLK),           (IEN  | PTD | DIS | M4)) /*GPIO_97
> - L2*/\
> -       MUX_VAL(CP(CAM_FLD),            (IEN  | PTD | DIS | M4)) /*GPIO_98
> - RIGHT*/\
> -       MUX_VAL(CP(CAM_D0),             (IEN  | PTD | DIS | M4)) /*GPIO_99
> - MENU*/\
> -       MUX_VAL(CP(CAM_D1),             (IEN  | PTD | DIS | M4))
> /*GPIO_100 - START*/\
> -       MUX_VAL(CP(CAM_D2),             (IEN  | PTD | DIS | M4))
> /*GPIO_101 - Y*/\
> -       MUX_VAL(CP(CAM_D3),             (IEN  | PTD | DIS | M4))
> /*GPIO_102 - L1*/\
> -       MUX_VAL(CP(CAM_D4),             (IEN  | PTD | DIS | M4))
> /*GPIO_103 - DOWN*/\
> -       MUX_VAL(CP(CAM_D5),             (IEN  | PTD | DIS | M4))
> /*GPIO_104 - SELECT*/\
> -       MUX_VAL(CP(CAM_D6),             (IEN  | PTD | DIS | M4))
> /*GPIO_105 - R1*/\
> -       MUX_VAL(CP(CAM_D7),             (IEN  | PTD | DIS | M4))
> /*GPIO_106 - B*/\
> -       MUX_VAL(CP(CAM_D8),             (IEN  | PTD | DIS | M4))
> /*GPIO_107 - R2*/\
> -       MUX_VAL(CP(CAM_D10),            (IEN  | PTD | DIS | M4))
> /*GPIO_109 - X*/\
> -       MUX_VAL(CP(CAM_D11),            (IEN  | PTD | DIS | M4))
> /*GPIO_110 - UP*/\
> -       MUX_VAL(CP(CAM_XCLKB),          (IEN  | PTD | DIS | M4))
> /*GPIO_111 - A*/\
> - /*Audio Interface To External DAC (Headphone, Speakers)*/\
> -       MUX_VAL(CP(MCBSP2_FSX),         (IDIS | PTD | DIS | M0))
> /*McBSP2_FSX*/\
> -       MUX_VAL(CP(MCBSP2_CLKX),        (IDIS | PTD | DIS | M0))
> /*McBSP2_CLKX*/\
> -       MUX_VAL(CP(MCBSP2_DX),          (IDIS | PTD | DIS | M0))
> /*McBSP2_DX*/\
> -       MUX_VAL(CP(MCBSP_CLKS),         (IEN  | PTD | DIS | M0))
> /*McBSP_CLKS*/\
> -       MUX_VAL(CP(MCBSP2_DR),          (IDIS | PTD | DIS | M4))
> /*GPIO_118*/\
> -                                                                /* -
> nPOWERDOWN_DAC*/\
> - /*Expansion card 1*/\
> -       MUX_VAL(CP(MMC1_CLK),           (IDIS | PTU | EN  | M0))
> /*MMC1_CLK*/\
> -       MUX_VAL(CP(MMC1_CMD),           (IEN  | PTU | EN  | M0))
> /*MMC1_CMD*/\
> -       MUX_VAL(CP(MMC1_DAT0),          (IEN  | PTU | EN  | M0))
> /*MMC1_DAT0*/\
> -       MUX_VAL(CP(MMC1_DAT1),          (IEN  | PTU | EN  | M0))
> /*MMC1_DAT1*/\
> -       MUX_VAL(CP(MMC1_DAT2),          (IEN  | PTU | EN  | M0))
> /*MMC1_DAT2*/\
> -       MUX_VAL(CP(MMC1_DAT3),          (IEN  | PTU | EN  | M0))
> /*MMC1_DAT3*/\
> -       MUX_VAL(CP(MMC1_DAT4),          (IEN  | PTD | DIS | M4))
> /*GPIO_126 - MMC1_WP*/\
> - /*Expansion card 2*/\
> -       MUX_VAL(CP(MMC2_CLK),           (IDIS | PTD | DIS | M0))
> /*MMC2_CLK*/\
> -       MUX_VAL(CP(MMC2_CMD),           (IEN  | PTU | EN  | M0))
> /*MMC2_CMD*/\
> -       MUX_VAL(CP(MMC2_DAT0),          (IEN  | PTU | EN  | M0))
> /*MMC2_DAT0*/\
> -       MUX_VAL(CP(MMC2_DAT1),          (IEN  | PTU | EN  | M0))
> /*MMC2_DAT1*/\
> -       MUX_VAL(CP(MMC2_DAT2),          (IEN  | PTU | EN  | M0))
> /*MMC2_DAT2*/\
> -       MUX_VAL(CP(MMC2_DAT3),          (IEN  | PTU | EN  | M0))
> /*MMC2_DAT3*/\
> -       MUX_VAL(CP(MMC2_DAT4),          (IDIS | PTD | DIS | M1))
> /*MMC2_DIR_DAT0*/\
> -       MUX_VAL(CP(MMC2_DAT5),          (IDIS | PTD | DIS | M1))
> /*MMC2_DIR_DAT1*/\
> -       MUX_VAL(CP(MMC2_DAT6),          (IDIS | PTD | DIS | M1))
> /*MMC2_DIR_CMD */\
> -       MUX_VAL(CP(MMC2_DAT7),          (IEN  | PTU | EN  | M1))
> /*MMC2_CLKIN*/\
> -       MUX_VAL(CP(MMC1_DAT5),          (IEN  | PTD | DIS | M4))
> /*GPIO_127 - MMC2_WP*/\
> - /*SDIO Interface to WIFI Module*/\
> -       MUX_VAL(CP(ETK_CLK_ES2),        (IEN  | PTD | DIS | M2))
> /*MMC3_CLK*/\
> -       MUX_VAL(CP(ETK_CTL_ES2),        (IEN  | PTU | EN  | M2))
> /*MMC3_CMD*/\
> -       MUX_VAL(CP(ETK_D4_ES2),         (IEN  | PTU | EN  | M2))
> /*MMC3_DAT0*/\
> -       MUX_VAL(CP(ETK_D5_ES2),         (IEN  | PTU | EN  | M2))
> /*MMC3_DAT1*/\
> -       MUX_VAL(CP(ETK_D6_ES2),         (IEN  | PTU | EN  | M2))
> /*MMC3_DAT2*/\
> -       MUX_VAL(CP(ETK_D3_ES2),         (IEN  | PTU | EN  | M2))
> /*MMC3_DAT3*/\
> - /*Audio Interface To Bluetooth chip*/\
> -       MUX_VAL(CP(MCBSP3_DX),          (IDIS | PTD | DIS | M0))
> /*McBSP3_DX*/\
> -       MUX_VAL(CP(MCBSP3_DR),          (IEN  | PTD | DIS | M0))
> /*McBSP3_DR*/\
> -       MUX_VAL(CP(MCBSP3_CLKX),        (IEN  | PTD | DIS | M0))
> /*McBSP3_CLKX*/\
> -       MUX_VAL(CP(MCBSP3_FSX),         (IEN  | PTD | DIS | M0))
> /*McBSP3_FSX*/\
> - /*Digital Interface to Bluetooth (UART)*/\
> -       MUX_VAL(CP(UART1_TX),           (IDIS | PTD | DIS | M0))
> /*UART1_TX*/\
> -       MUX_VAL(CP(UART1_RTS),          (IDIS | PTD | DIS | M0))
> /*UART1_RTS*/\
> -       MUX_VAL(CP(UART1_CTS),          (IEN  | PTU | EN  | M0))
> /*UART1_CTS*/\
> -       MUX_VAL(CP(UART1_RX),           (IEN  | PTD | DIS | M0))
> /*UART1_RX*/\
> - /*Audio Interface to Triton2 chip (TPS65950)*/\
> -       MUX_VAL(CP(MCBSP4_CLKX),        (IEN  | PTD | DIS | M0))
> /*McBSP4_CLKX*/\
> -       MUX_VAL(CP(MCBSP4_DR),          (IEN  | PTD | DIS | M0))
> /*McBSP4_DR*/\
> -       MUX_VAL(CP(MCBSP4_DX),          (IDIS | PTD | DIS | M0))
> /*McBSP4_DX*/\
> -       MUX_VAL(CP(MCBSP4_FSX),         (IEN  | PTD | DIS | M0))
> /*McBSP4_FSX*/\
> - /*GPIO definitions for muxed pins on AV connector*/\
> -       MUX_VAL(CP(UART2_CTS),          (IEN  | PTD | EN  | M4))
> /*GPIO_144,*/\
> -
> /*UART2_CTS*/\
> -       MUX_VAL(CP(UART2_RTS),          (IEN  | PTD | EN  | M4))
> /*GPIO_145,*/\
> -
> /*UART2_RTS*/\
> -       MUX_VAL(CP(UART2_TX),           (IEN  | PTD | EN  | M4))
> /*GPIO_146,*/\
> -
> /*UART2_TX*/\
> -       MUX_VAL(CP(UART2_RX),           (IEN  | PTD | EN  | M4))
> /*GPIO_147,*/\
> -
> /*UART2_RX*/\
> - /*Serial Interface (Peripheral boot, Linux console, on AV connector)*/\
> - /*RX pulled up to avoid noise when nothing is connected to serial port*/\
> -       MUX_VAL(CP(UART3_RX_IRRX),      (IEN  | PTU | EN  | M0))
> /*UART3_RX*/\
> -       MUX_VAL(CP(UART3_TX_IRTX),      (IDIS | PTD | DIS | M0))
> /*UART3_TX*/\
> - /*LEDs (Controlled by OMAP)*/\
> -       MUX_VAL(CP(MMC1_DAT6),          (IDIS | PTD | DIS | M4))
> /*GPIO_128*/\
> -                                                                /* -
> LED_MMC1*/\
> -       MUX_VAL(CP(MMC1_DAT7),          (IDIS | PTD | DIS | M4))
> /*GPIO_129*/\
> -                                                                /* -
> LED_MMC2*/\
> -       MUX_VAL(CP(MCBSP1_DX),          (IDIS | PTD | DIS | M4))
> /*GPIO_158*/\
> -                                                                /* -
> LED_BT*/\
> -       MUX_VAL(CP(MCBSP1_DR),          (IDIS | PTD | DIS | M4))
> /*GPIO_159*/\
> -                                                                /* -
> LED_WIFI*/\
> - /*Switches*/\
> -       MUX_VAL(CP(MCSPI1_CS2),         (IEN  | PTD | DIS | M4))
> /*GPIO_176*/\
> -                                                                /* -
> nHOLD_SWITCH*/\
> -       MUX_VAL(CP(CAM_D9),             (IEN  | PTD | DIS | M4))
> /*GPIO_108*/\
> -                                                                /* -
> nLID_SWITCH*/\
> - /*External IRQs*/\
> -       MUX_VAL(CP(CAM_HS),             (IEN  | PTD | DIS | M4))
> /*GPIO_94*/\
> -                                                                /* -
> nTOUCH_IRQ*/\
> -       MUX_VAL(CP(ETK_D7_ES2),         (IEN  | PTD | DIS | M4))
> /*GPIO_21*/\
> -                                                                /* -
> WIFI_IRQ*/\
> -       MUX_VAL(CP(MCBSP1_FSX),         (IEN  | PTD | DIS | M4))
> /*GPIO_161*/\
> -                                                                /* -
> nIRQ_NUB1*/\
> -       MUX_VAL(CP(MCBSP1_CLKX),        (IEN  | PTD | DIS | M4))
> /*GPIO_162*/\
> -                                                                /* -
> nIRQ_NUB2*/\
> - /*Various other stuff*/\
> -       MUX_VAL(CP(UART3_CTS_RCTX),     (IEN  | PTD | DIS | M4))
> /*GPIO_163*/\
> -                                                                /* -
> nOC_USB5*/\
> -       MUX_VAL(CP(ETK_D8_ES2),         (IEN  | PTD | DIS | M4))
> /*GPIO_22*/\
> -                                                                /* -
> MSECURE*/\
> -       MUX_VAL(CP(CSI2_DY1),           (IEN  | PTD | DIS | M4))
> /*GPIO_115*/\
> -                                                                /* -
> POP_OVERHEAT*/\
> - /*External Resets and Enables*/\
> -       MUX_VAL(CP(ETK_D0_ES2),         (IDIS | PTD | DIS | M4))
> /*GPIO_14*/\
> -                                                                /* -
> nHDPHN_SHUTDOWN*/\
> -       MUX_VAL(CP(ETK_D1_ES2),         (IDIS | PTD | DIS | M4))
> /*GPIO_15*/\
> -                                                                /* -
> nBT_SHUTDOWN*/\
> -       MUX_VAL(CP(ETK_D9_ES2),         (IDIS | PTD | DIS | M4))
> /*GPIO_23*/\
> -                                                                /* -
> nWIFI_RESET*/\
> -       MUX_VAL(CP(MCBSP1_FSR),         (IDIS | PTU | DIS | M4))
> /*GPIO_157*/\
> -                                                                /* -
> nLCD_RESET*/\
> -       MUX_VAL(CP(MCBSP1_CLKR),        (IDIS | PTD | DIS | M4))
> /*GPIO_156*/\
> -                                                                /* -
> RESET_NUBS*/\
> -       MUX_VAL(CP(UART3_RTS_SD),       (IDIS | PTD | DIS | M4))
> /*GPIO_164*/\
> -                                                                /* -
> EN_USB_5V*/\
> - /*Spare GPIOs*/\
> -       MUX_VAL(CP(GPMC_NCS7),          (IEN  | PTD | EN  | M4))
> /*GPIO_58*/\
> -       MUX_VAL(CP(GPMC_WAIT2),         (IEN  | PTD | EN  | M4))
> /*GPIO_64*/\
> -       MUX_VAL(CP(GPMC_WAIT3),         (IEN  | PTD | EN  | M4))
> /*GPIO_65*/\
> -       MUX_VAL(CP(CAM_VS),             (IEN  | PTU | EN  | M4))
> /*GPIO_95*/\
> -       MUX_VAL(CP(CAM_WEN),            (IEN  | PTD | EN  | M4))
> /*GPIO_167*/\
> -       MUX_VAL(CP(HDQ_SIO),            (IEN  | PTD | EN  | M4))
> /*GPIO_170*/\
> - /*HS USB OTG Port (connects to HSUSB0)*/\
> -       MUX_VAL(CP(HSUSB0_CLK),         (IEN  | PTD | DIS | M0))
> /*HSUSB0_CLK*/\
> -       MUX_VAL(CP(HSUSB0_STP),         (IDIS | PTU | EN  | M0))
> /*HSUSB0_STP*/\
> -       MUX_VAL(CP(HSUSB0_DIR),         (IEN  | PTD | DIS | M0))
> /*HSUSB0_DIR*/\
> -       MUX_VAL(CP(HSUSB0_NXT),         (IEN  | PTD | DIS | M0))
> /*HSUSB0_NXT*/\
> -       MUX_VAL(CP(HSUSB0_DATA0),       (IEN  | PTD | DIS | M0))
> /*HSUSB0_DATA0*/\
> -       MUX_VAL(CP(HSUSB0_DATA1),       (IEN  | PTD | DIS | M0))
> /*HSUSB0_DATA1*/\
> -       MUX_VAL(CP(HSUSB0_DATA2),       (IEN  | PTD | DIS | M0))
> /*HSUSB0_DATA2*/\
> -       MUX_VAL(CP(HSUSB0_DATA3),       (IEN  | PTD | DIS | M0))
> /*HSUSB0_DATA3*/\
> -       MUX_VAL(CP(HSUSB0_DATA4),       (IEN  | PTD | DIS | M0))
> /*HSUSB0_DATA4*/\
> -       MUX_VAL(CP(HSUSB0_DATA5),       (IEN  | PTD | DIS | M0))
> /*HSUSB0_DATA5*/\
> -       MUX_VAL(CP(HSUSB0_DATA6),       (IEN  | PTD | DIS | M0))
> /*HSUSB0_DATA6*/\
> -       MUX_VAL(CP(HSUSB0_DATA7),       (IEN  | PTD | DIS | M0))
> /*HSUSB0_DATA7*/\
> - /*I2C Ports*/\
> -       MUX_VAL(CP(I2C1_SCL),           (IEN  | PTU | EN  | M0))
> /*I2C1_SCL - T2_CTRL*/\
> -       MUX_VAL(CP(I2C1_SDA),           (IEN  | PTU | EN  | M0))
> /*I2C1_SDA - T2_CTRL*/\
> -       MUX_VAL(CP(I2C3_SCL),           (IEN  | PTU | EN  | M0))
> /*I2C3_SCL - NUBS*/\
> -       MUX_VAL(CP(I2C3_SDA),           (IEN  | PTU | EN  | M0))
> /*I2C3_SDA - NUBS*/\
> -       MUX_VAL(CP(I2C4_SCL),           (IEN  | PTU | EN  | M0))
> /*I2C4_SCL - T2_SR*/\
> -       MUX_VAL(CP(I2C4_SDA),           (IEN  | PTU | EN  | M0))
> /*I2C4_SDA - T2_SR*/\
> - /*Serial Interface (Touch, LCD control)*/\
> -       MUX_VAL(CP(MCSPI1_CLK),         (IEN  | PTD | DIS | M0))
> /*McSPI1_CLK*/\
> -       MUX_VAL(CP(MCSPI1_SIMO),        (IEN  | PTD | DIS | M0))
> /*McSPI1_SIMO*/\
> -       MUX_VAL(CP(MCSPI1_SOMI),        (IEN  | PTD | DIS | M0))
> /*McSPI1_SOMI*/\
> -       MUX_VAL(CP(MCSPI1_CS0),         (IDIS | PTU | EN  | M0))
> /*McSPI1_CS0 - TOUCH*/\
> -       MUX_VAL(CP(MCSPI1_CS1),         (IDIS | PTU | EN  | M0))
> /*McSPI1_CS1 - LCD*/\
> - /*HS USB HOST Port (connects to HSUSB2)*/\
> -       MUX_VAL(CP(ETK_D10_ES2),        (IDIS | PTD | DIS | M3))
> /*USB_HOST_CLK*/\
> -       MUX_VAL(CP(ETK_D11_ES2),        (IDIS | PTU | EN  | M3))
> /*USB_HOST_STP*/\
> -       MUX_VAL(CP(ETK_D12_ES2),        (IEN  | PTD | DIS | M3))
> /*USB_HOST_DIR*/\
> -       MUX_VAL(CP(ETK_D13_ES2),        (IEN  | PTD | DIS | M3))
> /*USB_HOST_NXT*/\
> -       MUX_VAL(CP(ETK_D14_ES2),        (IEN  | PTD | DIS | M3))
> /*USB_HOST_D0*/\
> -       MUX_VAL(CP(ETK_D15_ES2),        (IEN  | PTD | DIS | M3))
> /*USB_HOST_D1*/\
> -       MUX_VAL(CP(MCSPI1_CS3),         (IEN  | PTD | DIS | M3))
> /*USB_HOST_D2*/\
> -       MUX_VAL(CP(MCSPI2_CS1),         (IEN  | PTD | DIS | M3))
> /*USB_HOST_D3*/\
> -       MUX_VAL(CP(MCSPI2_SIMO),        (IEN  | PTD | DIS | M3))
> /*USB_HOST_D4*/\
> -       MUX_VAL(CP(MCSPI2_SOMI),        (IEN  | PTD | DIS | M3))
> /*USB_HOST_D5*/\
> -       MUX_VAL(CP(MCSPI2_CS0),         (IEN  | PTD | DIS | M3))
> /*USB_HOST_D6*/\
> -       MUX_VAL(CP(MCSPI2_CLK),         (IEN  | PTD | DIS | M3))
> /*USB_HOST_D7*/\
> -       MUX_VAL(CP(ETK_D2_ES2),         (IDIS | PTD | DIS | M4))
> /*GPIO_16*/\
> -                                                                /* -
> nRESET_USB_HOST*/\
> - /*Control and debug */\
> -       MUX_VAL(CP(SYS_32K),            (IEN  | PTD | DIS | M0))
> /*SYS_32K*/\
> -       MUX_VAL(CP(SYS_CLKREQ),         (IEN  | PTD | DIS | M0))
> /*SYS_CLKREQ*/\
> -       MUX_VAL(CP(SYS_NIRQ),           (IEN  | PTU | EN  | M0))
> /*SYS_nIRQ*/\
> -       MUX_VAL(CP(SYS_BOOT0),          (IEN  | PTD | DIS | M4))
> /*GPIO_2*/\
> -       MUX_VAL(CP(SYS_BOOT1),          (IEN  | PTD | DIS | M4))
> /*GPIO_3*/\
> -       MUX_VAL(CP(SYS_BOOT2),          (IEN  | PTD | DIS | M4))
> /*GPIO_4*/\
> -       MUX_VAL(CP(SYS_BOOT3),          (IEN  | PTD | DIS | M4))
> /*GPIO_5*/\
> -       MUX_VAL(CP(SYS_BOOT4),          (IEN  | PTD | DIS | M4))
> /*GPIO_6*/\
> -       MUX_VAL(CP(SYS_BOOT5),          (IEN  | PTD | DIS | M4))
> /*GPIO_7*/\
> -       MUX_VAL(CP(SYS_BOOT6),          (IEN  | PTD | DIS | M4))
> /*GPIO_8*/\
> -       MUX_VAL(CP(SYS_OFF_MODE),       (IEN  | PTD | DIS | M0))
> /*SYS_OFF_MODE*/\
> - /*JTAG*/\
> -       MUX_VAL(CP(JTAG_NTRST),         (IEN  | PTD | DIS | M0))
> /*JTAG_NTRST*/\
> -       MUX_VAL(CP(JTAG_TCK),           (IEN  | PTD | DIS | M0))
> /*JTAG_TCK*/\
> -       MUX_VAL(CP(JTAG_TMS),           (IEN  | PTD | DIS | M0))
> /*JTAG_TMS*/\
> -       MUX_VAL(CP(JTAG_TDI),           (IEN  | PTD | DIS | M0))
> /*JTAG_TDI*/\
> -       MUX_VAL(CP(JTAG_EMU0),          (IEN  | PTD | DIS | M0))
> /*JTAG_EMU0*/\
> -       MUX_VAL(CP(JTAG_EMU1),          (IEN  | PTD | DIS | M0))
> /*JTAG_EMU1*/\
> - /*Die to Die stuff*/\
> -       MUX_VAL(CP(D2D_MCAD1),          (IEN  | PTD | EN  | M0))
> /*d2d_mcad1*/\
> -       MUX_VAL(CP(D2D_MCAD2),          (IEN  | PTD | EN  | M0))
> /*d2d_mcad2*/\
> -       MUX_VAL(CP(D2D_MCAD3),          (IEN  | PTD | EN  | M0))
> /*d2d_mcad3*/\
> -       MUX_VAL(CP(D2D_MCAD4),          (IEN  | PTD | EN  | M0))
> /*d2d_mcad4*/\
> -       MUX_VAL(CP(D2D_MCAD5),          (IEN  | PTD | EN  | M0))
> /*d2d_mcad5*/\
> -       MUX_VAL(CP(D2D_MCAD6),          (IEN  | PTD | EN  | M0))
> /*d2d_mcad6*/\
> -       MUX_VAL(CP(D2D_MCAD7),          (IEN  | PTD | EN  | M0))
> /*d2d_mcad7*/\
> -       MUX_VAL(CP(D2D_MCAD8),          (IEN  | PTD | EN  | M0))
> /*d2d_mcad8*/\
> -       MUX_VAL(CP(D2D_MCAD9),          (IEN  | PTD | EN  | M0))
> /*d2d_mcad9*/\
> -       MUX_VAL(CP(D2D_MCAD10),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad10*/\
> -       MUX_VAL(CP(D2D_MCAD11),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad11*/\
> -       MUX_VAL(CP(D2D_MCAD12),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad12*/\
> -       MUX_VAL(CP(D2D_MCAD13),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad13*/\
> -       MUX_VAL(CP(D2D_MCAD14),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad14*/\
> -       MUX_VAL(CP(D2D_MCAD15),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad15*/\
> -       MUX_VAL(CP(D2D_MCAD16),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad16*/\
> -       MUX_VAL(CP(D2D_MCAD17),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad17*/\
> -       MUX_VAL(CP(D2D_MCAD18),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad18*/\
> -       MUX_VAL(CP(D2D_MCAD19),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad19*/\
> -       MUX_VAL(CP(D2D_MCAD20),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad20*/\
> -       MUX_VAL(CP(D2D_MCAD21),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad21*/\
> -       MUX_VAL(CP(D2D_MCAD22),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad22*/\
> -       MUX_VAL(CP(D2D_MCAD23),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad23*/\
> -       MUX_VAL(CP(D2D_MCAD24),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad24*/\
> -       MUX_VAL(CP(D2D_MCAD25),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad25*/\
> -       MUX_VAL(CP(D2D_MCAD26),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad26*/\
> -       MUX_VAL(CP(D2D_MCAD27),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad27*/\
> -       MUX_VAL(CP(D2D_MCAD28),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad28*/\
> -       MUX_VAL(CP(D2D_MCAD29),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad29*/\
> -       MUX_VAL(CP(D2D_MCAD30),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad30*/\
> -       MUX_VAL(CP(D2D_MCAD31),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad31*/\
> -       MUX_VAL(CP(D2D_MCAD32),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad32*/\
> -       MUX_VAL(CP(D2D_MCAD33),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad33*/\
> -       MUX_VAL(CP(D2D_MCAD34),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad34*/\
> -       MUX_VAL(CP(D2D_MCAD35),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad35*/\
> -       MUX_VAL(CP(D2D_MCAD36),         (IEN  | PTD | EN  | M0))
> /*d2d_mcad36*/\
> -       MUX_VAL(CP(D2D_CLK26MI),        (IEN  | PTD | DIS | M0))
> /*d2d_clk26mi*/\
> -       MUX_VAL(CP(D2D_NRESPWRON),      (IEN  | PTD | EN  | M0))
> /*d2d_nrespwron*/\
> -       MUX_VAL(CP(D2D_NRESWARM),       (IEN  | PTU | EN  | M0))
> /*d2d_nreswarm*/\
> -       MUX_VAL(CP(D2D_ARM9NIRQ),       (IEN  | PTD | DIS | M0))
> /*d2d_arm9nirq*/\
> -       MUX_VAL(CP(D2D_UMA2P6FIQ),      (IEN  | PTD | DIS | M0))
> /*d2d_uma2p6fiq*/\
> -       MUX_VAL(CP(D2D_SPINT),          (IEN  | PTD | EN  | M0))
> /*d2d_spint*/\
> -       MUX_VAL(CP(D2D_FRINT),          (IEN  | PTD | EN  | M0))
> /*d2d_frint*/\
> -       MUX_VAL(CP(D2D_DMAREQ0),        (IEN  | PTD | DIS | M0))
> /*d2d_dmareq0*/\
> -       MUX_VAL(CP(D2D_DMAREQ1),        (IEN  | PTD | DIS | M0))
> /*d2d_dmareq1*/\
> -       MUX_VAL(CP(D2D_DMAREQ2),        (IEN  | PTD | DIS | M0))
> /*d2d_dmareq2*/\
> -       MUX_VAL(CP(D2D_DMAREQ3),        (IEN  | PTD | DIS | M0))
> /*d2d_dmareq3*/\
> -       MUX_VAL(CP(D2D_N3GTRST),        (IEN  | PTD | DIS | M0))
> /*d2d_n3gtrst*/\
> -       MUX_VAL(CP(D2D_N3GTDI),         (IEN  | PTD | DIS | M0))
> /*d2d_n3gtdi*/\
> -       MUX_VAL(CP(D2D_N3GTDO),         (IEN  | PTD | DIS | M0))
> /*d2d_n3gtdo*/\
> -       MUX_VAL(CP(D2D_N3GTMS),         (IEN  | PTD | DIS | M0))
> /*d2d_n3gtms*/\
> -       MUX_VAL(CP(D2D_N3GTCK),         (IEN  | PTD | DIS | M0))
> /*d2d_n3gtck*/\
> -       MUX_VAL(CP(D2D_N3GRTCK),        (IEN  | PTD | DIS | M0))
> /*d2d_n3grtck*/\
> -       MUX_VAL(CP(D2D_MSTDBY),         (IEN  | PTU | EN  | M0))
> /*d2d_mstdby*/\
> -       MUX_VAL(CP(D2D_SWAKEUP),        (IEN  | PTD | EN  | M0))
> /*d2d_swakeup*/\
> -       MUX_VAL(CP(D2D_IDLEREQ),        (IEN  | PTD | DIS | M0))
> /*d2d_idlereq*/\
> -       MUX_VAL(CP(D2D_IDLEACK),        (IEN  | PTU | EN  | M0))
> /*d2d_idleack*/\
> -       MUX_VAL(CP(D2D_MWRITE),         (IEN  | PTD | DIS | M0))
> /*d2d_mwrite*/\
> -       MUX_VAL(CP(D2D_SWRITE),         (IEN  | PTD | DIS | M0))
> /*d2d_swrite*/\
> -       MUX_VAL(CP(D2D_MREAD),          (IEN  | PTD | DIS | M0))
> /*d2d_mread*/\
> -       MUX_VAL(CP(D2D_SREAD),          (IEN  | PTD | DIS | M0))
> /*d2d_sread*/\
> -       MUX_VAL(CP(D2D_MBUSFLAG),       (IEN  | PTD | DIS | M0))
> /*d2d_mbusflag*/\
> -       MUX_VAL(CP(D2D_SBUSFLAG),       (IEN  | PTD | DIS | M0))
> /*d2d_sbusflag*/\
> -       MUX_VAL(CP(SDRC_CKE0),          (IDIS | PTU | EN  | M0))
> /*sdrc_cke0*/\
> -       MUX_VAL(CP(SDRC_CKE1),          (IDIS | PTU | EN  | M0))
> /*sdrc_cke1*/
> -
> -#define MUX_PANDORA_3730() \
> -       MUX_VAL(CP(GPIO126),            (IEN  | PTD | DIS | M4))
> /*GPIO_126 - MMC1_WP*/\
> -       MUX_VAL(CP(GPIO127),            (IEN  | PTD | DIS | M4))
> /*GPIO_127 - MMC2_WP*/\
> -       MUX_VAL(CP(GPIO128),            (IDIS | PTD | DIS | M4))
> /*GPIO_128 - LED_MMC1*/\
> -       MUX_VAL(CP(GPIO129),            (IDIS | PTD | DIS | M4))
> /*GPIO_129 - LED_MMC2*/
> -
> -#endif
> diff --git a/configs/omap3_pandora_defconfig
> b/configs/omap3_pandora_defconfig
> deleted file mode 100644
> index d8ee7995de..0000000000
> --- a/configs/omap3_pandora_defconfig
> +++ /dev/null
> @@ -1,40 +0,0 @@
> -CONFIG_ARM=y
> -CONFIG_ARCH_OMAP2PLUS=y
> -CONFIG_SYS_TEXT_BASE=0x80008000
> -CONFIG_SYS_MALLOC_F_LEN=0x2000
> -CONFIG_TARGET_OMAP3_PANDORA=y
> -CONFIG_NR_DRAM_BANKS=2
> -CONFIG_DISTRO_DEFAULTS=y
> -# CONFIG_USE_BOOTCOMMAND is not set
> -CONFIG_SYS_CONSOLE_IS_IN_ENV=y
> -CONFIG_SYS_CONSOLE_INFO_QUIET=y
> -CONFIG_VERSION_VARIABLE=y
> -CONFIG_SYS_PROMPT="Pandora # "
> -# CONFIG_CMD_IMI is not set
> -CONFIG_CMD_ASKENV=y
> -# CONFIG_CMD_FLASH is not set
> -CONFIG_CMD_GPIO=y
> -CONFIG_CMD_I2C=y
> -CONFIG_CMD_MMC=y
> -CONFIG_CMD_NAND=y
> -CONFIG_CMD_SPI=y
> -# CONFIG_CMD_SETEXPR is not set
> -# CONFIG_CMD_NET is not set
> -CONFIG_CMD_CACHE=y
> -CONFIG_CMD_EXT4_WRITE=y
> -CONFIG_CMD_MTDPARTS=y
> -CONFIG_MTDIDS_DEFAULT="nand0=omap2-nand.0"
>
> -CONFIG_MTDPARTS_DEFAULT="mtdparts=omap2-nand.0:512k(xloader),1920k(uboot),128k(uboot-env),10m(boot),-(rootfs)"
> -CONFIG_CMD_UBI=y
> -CONFIG_ENV_IS_IN_NAND=y
> -CONFIG_DM=y
> -CONFIG_TWL4030_LED=y
> -CONFIG_MMC_OMAP_HS=y
> -CONFIG_MTD=y
> -CONFIG_MTD_RAW_NAND=y
> -CONFIG_SYS_NAND_BUSWIDTH_16BIT=y
> -CONFIG_DM_SERIAL=y
> -CONFIG_SPI=y
> -CONFIG_OMAP3_SPI=y
> -CONFIG_FAT_WRITE=y
> -CONFIG_OF_LIBFDT=y
> diff --git a/doc/README.omap3 b/doc/README.omap3
> index 5ff9ee2bae..bf99cff848 100644
> --- a/doc/README.omap3
> +++ b/doc/README.omap3
> @@ -41,11 +41,6 @@ make
>  make omap3_evm_config
>  make
>
> -* Pandora:
> -
> -make omap3_pandora_config
> -make
> -
>  * Zoom MDK:
>
>  make omap3_zoom1_config
> diff --git a/include/configs/omap3_pandora.h
> b/include/configs/omap3_pandora.h
> deleted file mode 100644
> index ecf308e381..0000000000
> --- a/include/configs/omap3_pandora.h
> +++ /dev/null
> @@ -1,62 +0,0 @@
> -/* SPDX-License-Identifier: GPL-2.0+ */
> -/*
> - * (C) Copyright 2008-2010
> - * Gražvydas Ignotas <notasas@gmail.com>
> - *
> - * Configuration settings for the OMAP3 Pandora.
> - */
> -
> -#ifndef __CONFIG_H
> -#define __CONFIG_H
> -
> -/* override base for compatibility with MLO the device ships with */
> -
> -#include <configs/ti_omap3_common.h>
> -
> -#define CONFIG_REVISION_TAG            1
> -
> -#define CONFIG_SYS_DEVICE_NULLDEV      1
> -
> -/*
> - * Board NAND Info.
> - */
> -#define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_HAM1_CODE_SW
> -#define CONFIG_SYS_NAND_PAGE_SIZE      2048
> -#define CONFIG_SYS_NAND_OOBSIZE                64
> -
> -
> -#define CONFIG_BOOTCOMMAND \
> -       "run distro_bootcmd; " \
> -       "setenv bootargs ${bootargs_ubi}; " \
> -       "if mmc rescan && load mmc 0:1 ${loadaddr} autoboot.scr; then " \
> -               "source ${loadaddr}; " \
> -       "fi; " \
> -       "ubi part boot && ubifsmount ubi:boot && " \
> -               "ubifsload ${loadaddr} uImage && bootm ${loadaddr}"
> -
> -#define BOOT_TARGET_DEVICES(func) \
> -       func(MMC, mmc, 0) \
> -
> -#include <config_distro_bootcmd.h>
> -
> -#define CONFIG_EXTRA_ENV_SETTINGS \
> -       DEFAULT_LINUX_BOOT_ENV \
> -       "usbtty=cdc_acm\0" \
> -       "bootargs_ubi=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs
> rootfstype=ubifs " \
> -               "rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \
> -       "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
> -       BOOTENV \
> -
> -/* memtest works on */
> -
> -#if defined(CONFIG_MTD_RAW_NAND)
> -#define CONFIG_SYS_FLASH_BASE          NAND_BASE
> -#endif
> -
> -/* Monitor at start of flash */
> -#define CONFIG_SYS_MONITOR_BASE                CONFIG_SYS_FLASH_BASE
> -
> -
> -#define CONFIG_SYS_ENV_SECT_SIZE       (128 << 10)     /* 128 KiB */
> -
> -#endif                         /* __CONFIG_H */
> --
> 2.25.1
>
>

On Thu, May 28, 2020 at 3:12 PM Gražvydas Ignotas <notasas@gmail.com> wrote:
>
> I'm not aware of any remaining mainline u-boot users of this device (also asked around a bit on IRC), so:
> Acked-by: Grazvydas Ignotas <notasas@gmail.com>

Slite changes on the commit message and

Applied to u-boot-spi/master