[1/4] arm64: dts: rockchip: Sync v5.7-rc1 rk3399pro.dtsi
diff mbox series

Message ID 20200610103658.96678-2-jagan@amarulasolutions.com
State New
Headers show
Series
  • rockchip: rk3399pro: Add Add Rock Pi N10 support
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Commit Message

Jagan Teki June 10, 2020, 10:36 a.m. UTC 
Sync linux-next v5.7-rc1 rk3399pro.dtsi.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
 arch/arm/dts/rk3399pro.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
 create mode 100644 arch/arm/dts/rk3399pro.dtsi

Comments

Kever Yang June 27, 2020, 2:31 p.m. UTC | #1 
On 2020/6/10 下午6:36, Jagan Teki wrote:
> Sync linux-next v5.7-rc1 rk3399pro.dtsi.
>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

Thanks,
- Kever
> ---
>   arch/arm/dts/rk3399pro.dtsi | 22 ++++++++++++++++++++++
>   1 file changed, 22 insertions(+)
>   create mode 100644 arch/arm/dts/rk3399pro.dtsi
>
> diff --git a/arch/arm/dts/rk3399pro.dtsi b/arch/arm/dts/rk3399pro.dtsi
> new file mode 100644
> index 0000000000..bb5ebf6608
> --- /dev/null
> +++ b/arch/arm/dts/rk3399pro.dtsi
> @@ -0,0 +1,22 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +// Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
> +
> +#include "rk3399.dtsi"
> +
> +/ {
> +	compatible = "rockchip,rk3399pro";
> +};
> +
> +/* Default to enabled since AP talk to NPU part over pcie */
> +&pcie_phy {
> +	status = "okay";
> +};
> +
> +/* Default to enabled since AP talk to NPU part over pcie */
> +&pcie0 {
> +	ep-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
> +	num-lanes = <4>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pcie_clkreqn_cpm>;
> +	status = "okay";
> +};

Patch
diff mbox series 

diff --git a/arch/arm/dts/rk3399pro.dtsi b/arch/arm/dts/rk3399pro.dtsi
new file mode 100644
index 0000000000..bb5ebf6608
--- /dev/null
+++ b/arch/arm/dts/rk3399pro.dtsi
@@ -0,0 +1,22 @@ 
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
+
+#include "rk3399.dtsi"
+
+/ {
+	compatible = "rockchip,rk3399pro";
+};
+
+/* Default to enabled since AP talk to NPU part over pcie */
+&pcie_phy {
+	status = "okay";
+};
+
+/* Default to enabled since AP talk to NPU part over pcie */
+&pcie0 {
+	ep-gpios = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>;
+	num-lanes = <4>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie_clkreqn_cpm>;
+	status = "okay";
+};