From patchwork Mon Dec 31 16:59:24 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 138 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pf1-f199.google.com (cartago.priv [10.11.12.1]) by cassiopea.amarulasolutions.com (Postfix) with ESMTPS id 9FF822E002E for ; Mon, 31 Dec 2018 18:02:28 +0100 (CET) Received: by mail-pf1-f199.google.com with SMTP id b17sf29322943pfc.11 for ; Mon, 31 Dec 2018 09:02:28 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1546275747; cv=pass; d=google.com; s=arc-20160816; b=qbq1Q0sBgI0+7Z+hxWaPTmPsg6m3UBB2J7LrpOSKzdcbBV+A04VcrToaKFSa+UtjqM 65jv9HHJjom8iU1T+/Sj3n3C1Mxv4gtzTPweHB9g2qQiBLHcOv0jsX9IJkbJ+UDMIUKr nOM44MjV/maFHH8wj5c7O+bx1zftFsYYJY6IlJZfVzszeF6h5jYq5sBt7fijm3kk1NcJ dUpIlhNv0mUGolFQzHgMVE56MV3N5nHBLvVI9+qXfbgsTto/mO8GSjvt7cCj+6G2ZefS Xgi8fiJ1ERCW9e1IOMnVAPz8vzmmod2lMyEDN4txzcbJqWneMOLxZ/MiyWOC8VZ0F1mo kemg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=NWHh/3L/qMnULxpUefakBpk7J3UwTt4PJC/nNKRgfYA=; b=fqcD3j+1tmNo7p/9/wj6D4fFKDW8CNxbJj0iD2QBv1FOYR6OmjkuweCfJmXKbUdgzn SD2xwJqN45aVOoMzjDWQH2sA8pf3EQ03uTZWlkQc26nEWEEIxD0qAWxn28dn3A17oQSe eydyTdO9AtDdCEOjl40k1us1f9c/8A7ntUMWHDl2lFaUWTIElgwiq+JwYUXcJ1EZ0dxs vzAJY1FP/qxk5TvPjITM21YhddJintu+0eSncBnANAEzRwKWc12qMHLSUWxl+k/lZtj4 cbFMCELeLFiNn6BklLAnom1xP0rZciI8Aw8blFqIEIinrF0ns01zf1h4I96CUMA8QBGC E9+w== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=r0GdUE9U; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :list-post:list-help:list-archive:list-unsubscribe; bh=NWHh/3L/qMnULxpUefakBpk7J3UwTt4PJC/nNKRgfYA=; b=JVhbdU3bXwVvhmBjZJuEeQ7vguKm3e9nRUia5ZIu5kGBMimvbb9m7Gtj05yqDhlBCB txiizpti0Eg1pSm5iMPSW+9WNjt5BmJSWtsPhZQFM9jwpOhaVpWY/z6mnlG4dDAe/7Em zavgOui+cEUIc83Z5pvMBXsU5BXXvZS/M7Ew4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=NWHh/3L/qMnULxpUefakBpk7J3UwTt4PJC/nNKRgfYA=; b=I1J46eQfrQOGok0JTsbMH12qnsmwTG0LVXY60QPgnnsI6dE0lAdBSE6bgVPtpfbQMT juAiiNkAhtbrOtS9u7W7BiHaSsnucg8DEVZ7TzMl9SCifFYCyf71lrZLJiEn6CnazaXD sQ42stUl8Ncbiyw37j9yri7ed1ImFv7pTAqwbbSB0RtNMd4mJ/9iceHK45mbwqIvyZ3G Yk09x8+Ke4tz6o32TjyWUEb4lip5PPnUpRkdwL5T9Kt+KOa9v+JlH2o0Fni/PLF9f9jc YZbRnWcMYymh8cYWaNFdtBc+h9UvxIkFNzP1w/opcepWDovNHTlgDc+ZWqfhtyNzFGhs KU1A== X-Gm-Message-State: AJcUukdLxjkOeZ7Iy+KZbnpjoCX6CWDyapI7IouYqGYvC82G/nggPfg7 LxXMe7fZ7hvLN/q7mbo2H+S9Z2d6 X-Google-Smtp-Source: ALg8bN7Zfp6oBtGcPr/O9ZyqiW7OJysbIgSklGt8Z96JinK7Lu13mRUsiQCtPe34l41RTjK+YiVUMA== X-Received: by 2002:a17:902:690a:: with SMTP id j10mr14675256plk.84.1546275747279; Mon, 31 Dec 2018 09:02:27 -0800 (PST) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a62:20d5:: with SMTP id m82ls12625889pfj.5.gmail; Mon, 31 Dec 2018 09:02:27 -0800 (PST) X-Received: by 2002:a62:9fd9:: with SMTP id v86mr38402774pfk.191.1546275747016; Mon, 31 Dec 2018 09:02:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1546275746; cv=none; d=google.com; s=arc-20160816; b=AqOtime8QnGFGcQsy4CcYEEvyxzJHA4IuVLTqavGAwFZx56+GCmK7GCdbNv0hNg7ZF p5BrK4hBfpofpRHNIqI/U+5IuAh1AFdA48GJODNby0B2PuGSD1IdmJEDZut+49u2ctaz TvqDOxkHhbSB9glbA5DgwkqqMvAB4xrpANwCt8xH+/SNeblR6IkHK66dfHDl1tg19FOh d6++XiCrBK2eU6X/GdjzdH9KxWvZnWga7wEqxYTzvw1aTXhndOI93GKRdzEzrrJhwcqB dOVRq/B9iBncIm8AAjsoo/F1PUJH7Vxr4gJDqfa1WB1AwWSW7FezYPJNrBTI+tDlg5T9 P51A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=NWHh/3L/qMnULxpUefakBpk7J3UwTt4PJC/nNKRgfYA=; b=IqqLGo1p1XLbyQa6mH6oKSPDgvGb4hRbm2npr9R6rM99Ol9sOrzxmb2xj3uH0234rb J7z+H6Lz9RfBtWUWat9WWY/JAOylC6MKVuxFUf9jpfITh44ecUTK/LlGEwWaCcyH7I7G jTPyEMUmVXv8kJZAWJ3bYOaZcn/6ePKG5TjxqlqDu1CWBPclL7bGfC9gtgWjrkDSX3v3 QalyEvcHf7xgrwBQyeGKrYfqlO8Co/pA0rRab0yTK7DBfO4QAwKixtNipBY4I4TkQ9Ox ttCHNCAbmIF5LkCVrF2UISVWIPDv1uB0YdUKwhiNFfINQEhjphSIGTVGNkbKioEgAMaT a3iw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=r0GdUE9U; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. [209.85.220.65]) by mx.google.com with SMTPS id n85sor14295274pfb.16.2018.12.31.09.02.26 for (Google Transport Security); Mon, 31 Dec 2018 09:02:26 -0800 (PST) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a62:528e:: with SMTP id g136mr40289582pfb.111.1546275746714; Mon, 31 Dec 2018 09:02:26 -0800 (PST) Received: from localhost.localdomain ([115.97.184.237]) by smtp.gmail.com with ESMTPSA id p7sm90692925pfj.72.2018.12.31.09.02.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 31 Dec 2018 09:02:26 -0800 (PST) From: Jagan Teki To: Maxime Ripard , Andre Przywara Cc: Chen-Yu Tsai , Simon Glass , Tom Rini , u-boot@lists.denx.de, linux-sunxi@googlegroups.com, Michael Trimarchi , linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH v5 23/26] spi: sun4i: Add CLK support Date: Mon, 31 Dec 2018 22:29:24 +0530 Message-Id: <20181231165927.13803-24-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20181231165927.13803-1-jagan@amarulasolutions.com> References: <20181231165927.13803-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=r0GdUE9U; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add CLK support to enable AHB and MOD SPI clocks on sun4i_spi driver. Signed-off-by: Jagan Teki --- drivers/spi/sun4i_spi.c | 46 +++++++++++++++++++++++++++++++++++------ 1 file changed, 40 insertions(+), 6 deletions(-) diff --git a/drivers/spi/sun4i_spi.c b/drivers/spi/sun4i_spi.c index b86b5a00ad..5b01aa4226 100644 --- a/drivers/spi/sun4i_spi.c +++ b/drivers/spi/sun4i_spi.c @@ -19,6 +19,7 @@ */ #include +#include #include #include #include @@ -114,6 +115,8 @@ struct sun4i_spi_platdata { struct sun4i_spi_priv { struct sun4i_spi_regs *regs; + struct clk ahb_clk; + struct clk mod_clk; u32 freq; u32 mode; @@ -238,13 +241,40 @@ static int sun4i_spi_parse_pins(struct udevice *dev) return 0; } -static inline void sun4i_spi_enable_clock(void) +static inline int sun4i_spi_enable_clock(struct udevice *dev) { - struct sunxi_ccm_reg *const ccm = - (struct sunxi_ccm_reg *const)SUNXI_CCM_BASE; + struct sun4i_spi_priv *priv = dev_get_priv(dev); + int ret; + + ret = clk_get_by_name(dev, "ahb", &priv->ahb_clk); + if (ret) { + dev_err(dev, "failed to get ahb clock\n"); + return ret; + } + + ret = clk_get_by_name(dev, "mod", &priv->mod_clk); + if (ret) { + dev_err(dev, "failed to get mod clock\n"); + return ret; + } + + ret = clk_enable(&priv->ahb_clk); + if (ret) { + dev_err(dev, "failed to enable ahb clock (ret=%d)\n", ret); + return ret; + } + + ret = clk_enable(&priv->mod_clk); + if (ret) { + dev_err(dev, "failed to enable mod clock (ret=%d)\n", ret); + goto err_ahb; + } - setbits_le32(&ccm->ahb_gate0, (1 << AHB_GATE_OFFSET_SPI0)); - writel((1 << 31), &ccm->spi0_clk_cfg); + return 0; + +err_ahb: + clk_disable(&priv->ahb_clk); + return ret; } static int sun4i_spi_ofdata_to_platdata(struct udevice *bus) @@ -267,8 +297,12 @@ static int sun4i_spi_probe(struct udevice *bus) { struct sun4i_spi_platdata *plat = dev_get_platdata(bus); struct sun4i_spi_priv *priv = dev_get_priv(bus); + int ret; + + ret = sun4i_spi_enable_clock(bus); + if (ret) + return ret; - sun4i_spi_enable_clock(); sun4i_spi_parse_pins(bus); priv->regs = (struct sun4i_spi_regs *)(uintptr_t)plat->base_addr;