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[209.85.220.65]) by mx.google.com with SMTPS id l17sor24325692plb.27.2020.07.20.23.47.12 for (Google Transport Security); Mon, 20 Jul 2020 23:47:12 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a17:902:9a4b:: with SMTP id x11mr21179729plv.255.1595314031816; Mon, 20 Jul 2020 23:47:11 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c809:c7d5:38b9:d6b4:d935:307b]) by smtp.gmail.com with ESMTPSA id mv6sm1709069pjb.57.2020.07.20.23.47.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jul 2020 23:47:10 -0700 (PDT) From: Jagan Teki To: Kever Yang , Philipp Tomsich , Simon Glass Cc: Suniel Mahesh , U-Boot-Denx , linux-rockchip@lists.infradead.org, linux-amarula , Jagan Teki Subject: [PATCH v3 1/2] rockchip: Add rk3288 SoC detection helper Date: Tue, 21 Jul 2020 12:16:37 +0530 Message-Id: <20200721064638.16236-1-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=go4DHpIP; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Rockchip SoC's has a new revision chip for rk3288 SoCs. RK3288 has a new revision chip called RK3288W which is similar but different hclk_vio clock and fixed OHCI host. Add common Rockchip SoC detection helper to support this rk3288w detection. Signed-off-by: Jagan Teki Reviewed-by: Kever Yang --- Changes for v3: - add rk3288 cpu spec header .../include/asm/arch-rockchip/cpu_rk3288.h | 49 +++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 arch/arm/include/asm/arch-rockchip/cpu_rk3288.h diff --git a/arch/arm/include/asm/arch-rockchip/cpu_rk3288.h b/arch/arm/include/asm/arch-rockchip/cpu_rk3288.h new file mode 100644 index 0000000000..7445e64b8c --- /dev/null +++ b/arch/arm/include/asm/arch-rockchip/cpu_rk3288.h @@ -0,0 +1,49 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Rockchip Electronics Co., Ltd. + */ + +#ifndef __ASM_ARCH_CPU_RK3288_H +#define __ASM_ARCH_CPU_RK3288_H + +#include + +#define ROCKCHIP_CPU_MASK 0xffff0000 +#define ROCKCHIP_CPU_RK3288 0x32880000 + +#define ROCKCHIP_SOC_MASK (ROCKCHIP_CPU_MASK | 0xff) +#define ROCKCHIP_SOC_RK3288 (ROCKCHIP_CPU_RK3288 | 0x00) +#define ROCKCHIP_SOC_RK3288W (ROCKCHIP_CPU_RK3288 | 0x01) + +#define RK3288_HDMI_PHYS 0xff980000 +#define HDMI_CONFIG0_ID 0x4 +#define RK3288W_HDMI_REVID 0x1a + +static inline int rockchip_soc_id(void) +{ + u8 reg; + +#if defined(CONFIG_ROCKCHIP_RK3288) + reg = readb(RK3288_HDMI_PHYS + HDMI_CONFIG0_ID); + if (reg == RK3288W_HDMI_REVID) + return ROCKCHIP_SOC_RK3288W; + else + return ROCKCHIP_SOC_RK3288; +#else + return 0; +#endif +} + +#define ROCKCHIP_SOC(id, ID) \ +static inline bool soc_is_##id(void) \ +{ \ + int soc_id = rockchip_soc_id(); \ + if (soc_id) \ + return ((soc_id & ROCKCHIP_SOC_MASK) == ROCKCHIP_SOC_ ##ID); \ + return false; \ +} + +ROCKCHIP_SOC(rk3288, RK3288) +ROCKCHIP_SOC(rk3288w, RK3288W) + +#endif /* __ASM_ARCH_CPU_RK3288_H */