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[209.85.220.65]) by mx.google.com with SMTPS id s18sor8193972pgk.74.2019.03.11.06.37.37 for (Google Transport Security); Mon, 11 Mar 2019 06:37:37 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; X-Received: by 2002:a63:5813:: with SMTP id m19mr30213063pgb.294.1552311457673; Mon, 11 Mar 2019 06:37:37 -0700 (PDT) Received: from localhost.localdomain ([183.82.224.199]) by smtp.gmail.com with ESMTPSA id s79sm9960397pfa.61.2019.03.11.06.37.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 11 Mar 2019 06:37:37 -0700 (PDT) From: Jagan Teki To: Maxime Ripard , David Airlie , Daniel Vetter , Chen-Yu Tsai , Michael Turquette , Rob Herring , Mark Rutland Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, Michael Trimarchi , linux-amarula@amarulasolutions.com, linux-sunxi@googlegroups.com, Jagan Teki Subject: [PATCH v8 05/15] drm/sun4i: dsi: Get tcon0_div at runtime Date: Mon, 11 Mar 2019 19:06:27 +0530 Message-Id: <20190311133637.18334-6-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.18.0.321.gffc6fa0e3 In-Reply-To: <20190311133637.18334-1-jagan@amarulasolutions.com> References: <20190311133637.18334-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=ccJ5Jpwk; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.65 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , tcon0 divider is used while computing drq edge0 for burst mode devices, currently driver is using default macro value 4 via SUN6I_DSI_TCON_DIV. Unfortunately not all the panel devices are working with this default divider value 4, so to make future changes on this divider value get the divider from tcon dot clock at runtime. Signed-off-by: Jagan Teki Tested-by: Merlijn Wajer --- drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 8 +++++++- drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h | 2 -- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c index a8d3df0ea8f5..388e1161974c 100644 --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c @@ -392,9 +392,15 @@ static u16 sun6i_dsi_get_drq_edge0(struct sun6i_dsi *dsi, struct drm_display_mode *mode, u16 line_num, u16 edge1) { + struct sun4i_tcon *tcon = dsi->tcon; + unsigned long dclk_rate, dclk_parent_rate, tcon0_div; u16 edge0 = edge1; - edge0 += (mode->hdisplay + 40) * SUN6I_DSI_TCON_DIV / 8; + dclk_rate = clk_get_rate(tcon->dclk); + dclk_parent_rate = clk_get_rate(clk_get_parent(tcon->dclk)); + tcon0_div = dclk_parent_rate / dclk_rate; + + edge0 += (mode->hdisplay + 40) * tcon0_div / 8; if (edge0 > line_num) return edge0 - line_num; diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h index 20516f7ab179..747c451a9a20 100644 --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.h @@ -13,8 +13,6 @@ #include #include -#define SUN6I_DSI_TCON_DIV 4 - struct sun6i_dsi { struct drm_connector connector; struct drm_encoder encoder;