From patchwork Mon Dec 21 11:31:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1603 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pf1-f197.google.com (mail-pf1-f197.google.com [209.85.210.197]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 7E4B53F0D3 for ; Mon, 21 Dec 2020 12:32:25 +0100 (CET) Received: by mail-pf1-f197.google.com with SMTP id v138sf4854239pfc.10 for ; Mon, 21 Dec 2020 03:32:25 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1608550344; cv=pass; d=google.com; s=arc-20160816; b=y++SFU5lnVKCUJFDxYobar4v+d4HQJuSVjJcS/DXf5BqPILmJIj9vUtPJ5HVgFmIaa q5gDHajf2l+XxoLi3BgZfRQgM2qJqYFXrBykB6FhPmajU7gMFOlI+ASa+HFE9Z9eF5Eq vLPsc+rHHHDh428UAI2+UkFhPzp8KLy175BpuuHE+D6aSWaxsDQqZEA8rgJUf9wgyvug d4G6q8GT47jAO1XdJqN1HI69MOle6c4FPCuKF0vKQCdnZtTFdt7hFB8/Pg3axxBV69nU SW0Vp+abVRYNdqlG+ywhUnJoFq6G+AkWZersQpVmp39nI4M7FzDmnnjoFqd3SK5Nfn1P X+EA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=4BAR9JvUmMUqmP548p87V7hPUSfk/DGvIBH0yYZCSTk=; b=BYrDk4XTzgjHj0eRXdNLxL+yF7G8H7klBLMHNyjBKS7MldjzZaA8LJwe7nt6+AXywI MnR8py8ZLGmFPthAbJ7Be1fDQYCuMtpSBC8Zr60SBQhsvs7sv+kQigaBdXTwtiPa1EIt YYoAAiAswTr0s6Q5qIHZAJOISJKeBpSlnRoBmb90bt7JS+i/4WRW+EdRy6n91xHI/gHj P5m/hFeiIbr1Oh9sjpNJkFI97oNHKwy/7wXvaKoXY99Eg1tnFlmodPfhc/TU3+PAKsl7 SEojELF2jlZEDpAO70I1TFzDo8KFP4SfRoD/U+Tw4I31yDFCkqJP4RgulQ5wb4KcireS SKvw== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=pcsFX0KW; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=4BAR9JvUmMUqmP548p87V7hPUSfk/DGvIBH0yYZCSTk=; b=ZZa8haWRQZtga/QcQI8b5rBrgGKH8LZ1KXCOUE5z7KsZi7SqhdqhnB9Bc2HC2iyjOO t9AwGDYkELs6WfUgBDqnmcskkqI4Z6cPVeRvt7MGavvhpz2r6UtbfUj3nFnTgX2Trb6F LpSi5dUVx2jxrG7MWUy9a/qu7FsWfpfNU/t7s= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=4BAR9JvUmMUqmP548p87V7hPUSfk/DGvIBH0yYZCSTk=; b=LDJeJb+NB55pd7StEeAROJGEUTAg/DLi9dDM8EsqJ28xFWJSNP/v4Y1/XX9KXHsFoz 9e/AyzeAqtzSe+zTpy6GOBVQqmWRdvgyuIqB0Ym2U58WJEnKsjcmuRCjn3RlqNxdGLXS oE3Iy2DzhBGS2pC9zq5zmpc0V2DK8DlePTHV2d9mYgvmKvN+MIYOxVdYlLQnpYwvB84q GnAt2INs6V51Eb1ZHAHrDpJRmPAMmEQ+x4/y93eO2t3ybCuys+0V4vm7lbG0yjdh6nIU ZjPW1AaG7zoU/mvtNFerEiJoraJIU1j8XVn0F7K1e+bntLASb44USgJtS+LUrSLX+iE6 CT9A== X-Gm-Message-State: AOAM533nsFCXCTiTadUrLihCmF6Zw8txul6ZeVUSknAhKNCnmy8XHv5m eIdFZpj595rpsdj29giUQ+qym4xn X-Google-Smtp-Source: ABdhPJy2kBn79r8rm2M8hjLTeBjnnCtbwy4cwiT1WA6Dj+F6mEtfXQsvvsP9M+N50TCj4l2UAC58lg== X-Received: by 2002:a63:4950:: with SMTP id y16mr14864981pgk.415.1608550344284; Mon, 21 Dec 2020 03:32:24 -0800 (PST) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a63:d408:: with SMTP id a8ls94700pgh.1.gmail; Mon, 21 Dec 2020 03:32:23 -0800 (PST) X-Received: by 2002:aa7:9784:0:b029:1a6:5fb2:ecee with SMTP id o4-20020aa797840000b02901a65fb2eceemr14859955pfp.41.1608550343577; Mon, 21 Dec 2020 03:32:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1608550343; cv=none; d=google.com; s=arc-20160816; b=Y7uzPoY2Kx7rc5niRlojVWK91Nsc/PRCQzXDtBMOL0OunZ770GRPCMPvjlMjE4O1x8 iK3PJ8kLbuZV5VbmL/U36RaqtePS3ZVYiUxBSxSQys5muxT3c2xPsUlEYzMeA/w+FkNc yvUTdvj1JbPelZAcOHUFLAtekX1ZbTeXBtX7asxkI6PIUDKdjHN7oP3Uvo941h1TyzVS k0vq0ZRn2NVfEYbtb7pliuF1Z1vLaA5jasyL3FM2Pv8QpPDUFY8cFRHrJGnhSvGEwlDO fPQ6Wmqh5aqD+KXEmqkLRDlLkKT4K7J5NvPxp3/lpI27PDGFV6Y3thtt3soi2/S+UFeI +XLQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=WOFEUXTrIEFwAJjA7uwBOdNVJbs2hAoilHaZiMMbFn8=; b=dtzO9aN0YFqeeQPUtM4drA9tWc0sqGF/Qjvspj6qPELzKKzjr59NR9hmKN4CydywZD JnqhuzYM53vB58SVJ36N4jaue7JtthUhX3/kVzdxA61Uq5UmZIY6ARGpfSpU5bIMkx80 P5qhCcRgRm4uv2fKKyzmVcJ97wApcfTM4BJzdVUxQwCdsKU9iqfd3JQPzbI4E8stqK1j /qecQztaYWrjvxUOdraTY+n4vP5AlcbbmkzFypqJ99FO0kFLFWRok53xg4qMAI35Fa63 GJXzmd6SdKlS/qUcXFTFuXOPsVVgErjPlkbWwJDtP+V/kuyrwFzL58i+SiLn4IATxbCu uyAA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=pcsFX0KW; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Received: from mail-sor-f41.google.com (mail-sor-f41.google.com. [209.85.220.41]) by mx.google.com with SMTPS id s19sor8543104plq.39.2020.12.21.03.32.23 for (Google Transport Security); Mon, 21 Dec 2020 03:32:23 -0800 (PST) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a17:902:ee86:b029:da:76bc:2aa4 with SMTP id a6-20020a170902ee86b02900da76bc2aa4mr15872351pld.62.1608550343277; Mon, 21 Dec 2020 03:32:23 -0800 (PST) Received: from localhost.localdomain ([2405:201:c00a:a884:b9d4:ed90:a69c:2530]) by smtp.gmail.com with ESMTPSA id 197sm16714859pgd.69.2020.12.21.03.32.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Dec 2020 03:32:22 -0800 (PST) From: Jagan Teki To: Rob Herring , Shawn Guo , Li Yang , Fabio Estevam , Krzysztof Kozlowski Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula@amarulasolutions.com, Jagan Teki , Catalin Marinas , Will Deacon , Matteo Lisi Subject: [PATCH v2 3/6] arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini SoM Date: Mon, 21 Dec 2020 17:01:48 +0530 Message-Id: <20201221113151.94515-4-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20201221113151.94515-1-jagan@amarulasolutions.com> References: <20201221113151.94515-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=pcsFX0KW; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam. General features: - NXP i.MX8M Mini - Up to 2GB LDDR4 - 8/16GB eMMC - Gigabit Ethernet - USB 2.0 Host/OTG - PCIe Gen2 interface - I2S - MIPI DSI to LVDS - rest of i.MX8M Mini features i.Core MX8M Mini needs to mount on top of Engicam baseboards for creating complete platform solutions. Add support for it. Signed-off-by: Matteo Lisi Signed-off-by: Jagan Teki --- Changes for v2: - updated commit message - add cpu nodes - add fec1 node - fixed pmic tree comments - dropped engicam from filename since it aligned with imx6 engicam dts files naming conventions. .../dts/freescale/imx8mm-icore-mx8mm.dtsi | 232 ++++++++++++++++++ 1 file changed, 232 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm.dtsi diff --git a/arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm.dtsi new file mode 100644 index 000000000000..e67865fd102a --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm.dtsi @@ -0,0 +1,232 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 NXP + * Copyright (c) 2019 Engicam srl + * Copyright (c) 2020 Amarula Solutons(India) + */ + +/ { + compatible = "engicam,icore-mx8mm", "fsl,imx8mm"; +}; + +&A53_0 { + cpu-supply = <®_buck4>; +}; + +&A53_1 { + cpu-supply = <®_buck4>; +}; + +&A53_2 { + cpu-supply = <®_buck4>; +}; + +&A53_3 { + cpu-supply = <®_buck4>; +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec1>; + phy-mode = "rgmii-id"; + phy-handle = <ðphy>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy: ethernet-phy@3 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <3>; + reset-gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; + reset-assert-us = <10000>; + }; + }; +}; + +&i2c1 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; + + pmic@8 { + compatible = "nxp,pf8121a"; + reg = <0x08>; + + regulators { + reg_ldo1: ldo1 { + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_ldo2: ldo2 { + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_ldo3: ldo3 { + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_ldo4: ldo4 { + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_buck1: buck1 { + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <400000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_buck2: buck2 { + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <400000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_buck3: buck3 { + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <400000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_buck4: buck4 { + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <400000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_buck5: buck5 { + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <400000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_buck6: buck6 { + regulator-max-microvolt = <1800000>; + regulator-min-microvolt = <400000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_buck7: buck7 { + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_vsnvs: vsnvs { + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; +}; + +&iomuxc { + pinctrl_fec1: fec1grp { + fsl,pins = < + MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 + MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 + MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f + MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f + MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f + MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f + MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 + MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 + MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 + MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 + MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f + MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 + MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 + MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f + MX8MM_IOMUXC_NAND_DATA01_GPIO3_IO7 0x19 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 + MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190 + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 + MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0 + MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0 + MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0 + MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0 + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 + >; + }; + + pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { + fsl,pins = < + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194 + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 + MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4 + MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4 + MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4 + MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4 + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 + >; + }; + + pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { + fsl,pins = < + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196 + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 + MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6 + MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6 + MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6 + MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6 + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 + >; + }; +}; + +/* eMMC */ +&usdhc3 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + bus-width = <8>; + non-removable; + status = "okay"; +};