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[209.85.220.41]) by mx.google.com with SMTPS id d14sor7162538plh.28.2021.02.14.11.41.35 for (Google Transport Security); Sun, 14 Feb 2021 11:41:35 -0800 (PST) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a17:902:7c83:b029:e2:b157:e25c with SMTP id y3-20020a1709027c83b02900e2b157e25cmr12216978pll.32.1613331695308; Sun, 14 Feb 2021 11:41:35 -0800 (PST) Received: from ub-XPS-13-9350.domain.name ([45.249.78.214]) by smtp.gmail.com with ESMTPSA id 125sm15129247pfu.7.2021.02.14.11.41.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 14 Feb 2021 11:41:34 -0800 (PST) From: Jagan Teki To: Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec , Laurent Pinchart Cc: dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-amarula@amarulasolutions.com, Jagan Teki Subject: [PATCH v3 4/7] drm: sun4i: dsi: Separate code for bridge pre_enable Date: Mon, 15 Feb 2021 01:10:59 +0530 Message-Id: <20210214194102.126146-5-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210214194102.126146-1-jagan@amarulasolutions.com> References: <20210214194102.126146-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b="lR/8/4IF"; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The existing driver has an enablement code for initializing clock, reset, PHY, DSI timings, and finally switching to HS mode. Move the clock, reset. PHY and DSI timings code into bridge pre_enable and keep HS mode switch in enable. As the driver supports fully enabled bridge functionalities, this new enablement code separation will help to initialize the host and slave bridge pre_enable, enable functions properly. Signed-off-by: Jagan Teki --- Changes for v3: - new patch drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c index 6f3c5330a468..3cdc14daf25c 100644 --- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c +++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c @@ -714,7 +714,7 @@ static int sun6i_dsi_start(struct sun6i_dsi *dsi, return 0; } -static void sun6i_dsi_bridge_enable(struct drm_bridge *bridge) +static void sun6i_dsi_bridge_pre_enable(struct drm_bridge *bridge) { struct drm_display_mode *mode = &bridge->encoder->crtc->state->adjusted_mode; struct sun6i_dsi *dsi = bridge_to_sun6i_dsi(bridge); @@ -775,6 +775,11 @@ static void sun6i_dsi_bridge_enable(struct drm_bridge *bridge) if (dsi->panel_bridge) dsi->panel_bridge->funcs->pre_enable(dsi->panel_bridge); +} + +static void sun6i_dsi_bridge_enable(struct drm_bridge *bridge) +{ + struct sun6i_dsi *dsi = bridge_to_sun6i_dsi(bridge); /* * FIXME: This should be moved after the switch to HS mode. @@ -883,6 +888,7 @@ static int sun6i_dsi_bridge_attach(struct drm_bridge *bridge, } static const struct drm_bridge_funcs sun6i_dsi_bridge_funcs = { + .pre_enable = sun6i_dsi_bridge_pre_enable, .enable = sun6i_dsi_bridge_enable, .disable = sun6i_dsi_bridge_disable, .attach = sun6i_dsi_bridge_attach,