From patchwork Sat Feb 27 08:39:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 1658 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pf1-f197.google.com (mail-pf1-f197.google.com [209.85.210.197]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id DB1CD3F0E8 for ; Sat, 27 Feb 2021 09:40:14 +0100 (CET) Received: by mail-pf1-f197.google.com with SMTP id c5sf8264992pfl.22 for ; Sat, 27 Feb 2021 00:40:14 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1614415213; cv=pass; d=google.com; s=arc-20160816; b=oxTGJ6VXA7L3jM4siyu2OdOpp42vZLnMQ75UM3493zzB5ak9vjyoqLdfyLGG4KMR9n +YWnJYLiSkusFSF6zA1BI70DLNkXpegqejOpnHR/ycCvXrXAYeuHjeVfxa7McRmC6nD1 b0bRmtCXla22KxtZx/2zlTT+tzxXnygWb6fscGnFovAt42NoBPpzEFNS2zEujvNoTf/+ 2eaFO/+62zMc7gE2UnEHnd1NTpo1U1HWX3zAQBkBjW3dYhD2h34Kx7ygnTwliEcKW5Jf qJhRC/ivRePYWqFk2ownKKSWqnlqCyIP+hArIUnnjappF/VwEaReKSqgZr8R/z1om6JY pdhw== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=fRniptVPyxALG/RtmJkpPISAxGR/kmLX4zkV4yS7yMI=; b=nmIj6POQzqF83sYfOtNPnAcbpRVeyk+q3G4Z5Ii2Lu2xfKu8xdQlzLUjPKARafn27G UMMbcAUmfbjNKGXi0cx/X51MXO94bnkxVUtD2cqvO2fs3tdTzXVe4oL52scpFQPAz4ZU quz6Qiy1spKHp5uvvW83JqLA3uzsIKAybHptextieMoONxTjM8ISlDRgv0Zv4mZf4CWs s7f8Q5ccptNmcMjEGdixXyG9USN1EvhuMWVD5t66+Tkst45+cWgWAOc29vYdPtV+I+oq G6KhjL+Gpzrdtc802noVOeS1uChOfVs3b3x/y0fJI1/B54+oUTMrTlQnMJbM/BqxNFKz aE5w== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b="ry/NKckx"; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=fRniptVPyxALG/RtmJkpPISAxGR/kmLX4zkV4yS7yMI=; b=G25wu1Mcb9KXGnYSti7vNzX6auNFMEHDgXUJhRsdcCEzbnkMIxMwe4kLnegJHH7SxA vJjHUp5MkqcUeeems+5eytd/gAhOstuQxHqCj5HyjGmO55Cmrn5aytoSkgn2QmCHzUw2 qQZHD2tdbj3vM+tV0BQsfPnUmvKiNBnepI9GY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=fRniptVPyxALG/RtmJkpPISAxGR/kmLX4zkV4yS7yMI=; b=rGdFlpuLbU2RG+FdMND3SBEHbB7Itmst1M/DlEZnV503XlRjCVijstulHpkSccpaF+ F7YAcIPQxshOhrRxJ3w33nz0Yq92qbtgyZ4SeWjJz/1a9n3hJCjrNw8sJZ8VzEYnHGxG F35eknYJprFSkO8JUnn0gAm3k6oU0lTEnWb5EiD15Jb4+nTllAwyCChZicUQ6Fg3vnQy Pg8tPkckARui+jbcZvIszGrDYj2BNyLa34lyWPIzOsUjsthgv9KEh+lPGODVcWLpjH+r N3Mp7dtmuNcY6Qta1cmRfxdV+bPX1tlfMpj30u/9AOWlnObf4JwGTauKuqJVhp+0d/Zf xWgQ== X-Gm-Message-State: AOAM533fVCz2ErnOFFsU+5STAeopgu7TWk7DvWy+ahBQHr1WVNuFfVbO ZWpV8TBpJ5hOh0J+68zM29hB75Ne X-Google-Smtp-Source: ABdhPJxoU+QIbGvLWijhlrhNsr/rACLKADWA8RW0ddcl/dMqgvmlxzNPAWSo5pTHUnaeccZw87N08w== X-Received: by 2002:a17:90a:a603:: with SMTP id c3mr1793889pjq.107.1614415213658; Sat, 27 Feb 2021 00:40:13 -0800 (PST) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a05:6a00:1704:: with SMTP id h4ls4945379pfc.2.gmail; Sat, 27 Feb 2021 00:40:13 -0800 (PST) X-Received: by 2002:a63:4d4e:: with SMTP id n14mr6231447pgl.37.1614415212985; Sat, 27 Feb 2021 00:40:12 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1614415212; cv=none; d=google.com; s=arc-20160816; b=yIze9qP+r+dDUabFbQcpuPDeU1SWld1xmxiWZYMnRfKf/IkQbQfHi7Dg4rdBwzQC+p zMxpX6fbdtSvzVf2f1yEBkFUPzaGPIU1LBzx/dmqHQ6dL18wuuy9qu6vaVgLQhuvJq9v zv7oiMpWL774oFekqEOarfto3PiuVFCmlvz8/ufxFmau4IFJw3O9QUI1IAiCzDeviH5b gNAMh5uMwIbO7U6AvjnvCRILa3NkDXDAraQkR2ud+SHmN6VLTa1gTQWNDjhGPfs2tE37 21EyHA+fvQv4Bi4fSHCMTftynQHDbEv0Tgm3LcSzzkqkw1v7NJt4YszVYCUCBPqdqsum MmuQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=D+Ceea9xetGGVsumPK44+znr9PRuYyOWS3BppgrtWvE=; b=lJEczjTWP6VovBDFYYIKBpVcv5+plq6Zy0dgkhcbwIR+n3C1Ot5UgMfjccoLjCsyBc vbrJx05kZLYIFS6jr+i2STMRwBRV27zKywHjrUa6AysY4zHxP+ROdt6cwH1ZtSSPkURc G7vH6ZMZvz0sVyDAN7WVk9pV64mXG8vwTqBZOtuAwryCL2znhv8vLQb4CdSn7NbRKZrN pXwSe+xj5duRUDTS5u3EOj11thaNHZJnvB7rUQDWDCTJRqmTADYLO0Fk53AQ2YDk8xap jkRQX+c2ul6SH6NC7dbxSVQdqtR1akWMuv1LVNtPPUGakN2NeDkHqGVEJuRXSL2NSxwV tqXg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b="ry/NKckx"; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Received: from mail-sor-f41.google.com (mail-sor-f41.google.com. [209.85.220.41]) by mx.google.com with SMTPS id v25sor5600733pfm.88.2021.02.27.00.40.12 for (Google Transport Security); Sat, 27 Feb 2021 00:40:12 -0800 (PST) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a62:7503:0:b029:1ee:5911:c518 with SMTP id q3-20020a6275030000b02901ee5911c518mr1804242pfc.37.1614415212702; Sat, 27 Feb 2021 00:40:12 -0800 (PST) Received: from ub-XPS-13-9350.domain.name ([103.161.30.242]) by smtp.gmail.com with ESMTPSA id x6sm9769676pfd.12.2021.02.27.00.40.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 27 Feb 2021 00:40:12 -0800 (PST) From: Jagan Teki To: Stefano Babic , Fabio Estevam , Peng Fan Cc: u-boot@lists.denx.de, linux-amarula@amarulasolutions.com, Matteo Lisi , Jagan Teki Subject: [PATCH 3/5] arm64: dts: imx8mm: Add Engicam i.Core MX8M Mini SoM Date: Sat, 27 Feb 2021 14:09:37 +0530 Message-Id: <20210227083939.81679-4-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210227083939.81679-1-jagan@amarulasolutions.com> References: <20210227083939.81679-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b="ry/NKckx"; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , i.Core MX8M Mini is an EDIMM SoM based on NXP i.MX8M Mini from Engicam. General features: - NXP i.MX8M Mini - Up to 2GB LDDR4 - 8/16GB eMMC - Gigabit Ethernet - USB 2.0 Host/OTG - PCIe Gen2 interface - I2S - MIPI DSI to LVDS - rest of i.MX8M Mini features i.Core MX8M Mini needs to mount on top of Engicam baseboards for creating complete platform solutions. Add support for it. Signed-off-by: Matteo Lisi Signed-off-by: Jagan Teki --- arch/arm/dts/imx8mm-icore-mx8mm.dtsi | 232 +++++++++++++++++++++++++++ 1 file changed, 232 insertions(+) create mode 100644 arch/arm/dts/imx8mm-icore-mx8mm.dtsi diff --git a/arch/arm/dts/imx8mm-icore-mx8mm.dtsi b/arch/arm/dts/imx8mm-icore-mx8mm.dtsi new file mode 100644 index 0000000000..b40148d728 --- /dev/null +++ b/arch/arm/dts/imx8mm-icore-mx8mm.dtsi @@ -0,0 +1,232 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 NXP + * Copyright (c) 2019 Engicam srl + * Copyright (c) 2020 Amarula Solutons(India) + */ + +/ { + compatible = "engicam,icore-mx8mm", "fsl,imx8mm"; +}; + +&A53_0 { + cpu-supply = <®_buck4>; +}; + +&A53_1 { + cpu-supply = <®_buck4>; +}; + +&A53_2 { + cpu-supply = <®_buck4>; +}; + +&A53_3 { + cpu-supply = <®_buck4>; +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec1>; + phy-mode = "rgmii-id"; + phy-handle = <ðphy>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy: ethernet-phy@3 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <3>; + reset-gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; + reset-assert-us = <10000>; + }; + }; +}; + +&i2c1 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; + + pmic@8 { + compatible = "nxp,pf8121a"; + reg = <0x08>; + + regulators { + reg_ldo1: ldo1 { + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_ldo2: ldo2 { + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_ldo3: ldo3 { + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_ldo4: ldo4 { + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_buck1: buck1 { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_buck2: buck2 { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_buck3: buck3 { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_buck4: buck4 { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_buck5: buck5 { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_buck6: buck6 { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_buck7: buck7 { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_vsnvs: vsnvs { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; +}; + +&iomuxc { + pinctrl_fec1: fec1grp { + fsl,pins = < + MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 + MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 + MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f + MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f + MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f + MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f + MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 + MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 + MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 + MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 + MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f + MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 + MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 + MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f + MX8MM_IOMUXC_NAND_DATA01_GPIO3_IO7 0x19 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400001c3 + MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400001c3 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190 + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 + MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0 + MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0 + MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0 + MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0 + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 + >; + }; + + pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { + fsl,pins = < + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194 + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 + MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4 + MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4 + MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4 + MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4 + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 + >; + }; + + pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { + fsl,pins = < + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196 + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 + MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6 + MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6 + MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6 + MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6 + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 + >; + }; +}; + +/* eMMC */ +&usdhc3 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + bus-width = <8>; + non-removable; + status = "okay"; +};