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[209.85.220.41]) by mx.google.com with SMTPS id a19sor6102805pfa.95.2021.03.15.10.46.35 for (Google Transport Security); Mon, 15 Mar 2021 10:46:35 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a62:8ccc:0:b029:1f6:c5e2:69ff with SMTP id m195-20020a628ccc0000b02901f6c5e269ffmr11484077pfd.46.1615830395590; Mon, 15 Mar 2021 10:46:35 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c00a:a884:6f76:4267:118b:2085]) by smtp.gmail.com with ESMTPSA id y9sm259494pja.50.2021.03.15.10.46.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Mar 2021 10:46:35 -0700 (PDT) From: Jagan Teki To: Stefano Babic , Fabio Estevam , Peng Fan Cc: u-boot@lists.denx.de, linux-amarula@amarulasolutions.com, Matteo Lisi , Jagan Teki , Tim Harvey , Adam Ford , Teresa Remmet , Igor Opaniuk Subject: [PATCH v2 2/5] configs: Add imx8mm-common header Date: Mon, 15 Mar 2021 23:15:40 +0530 Message-Id: <20210315174543.104002-3-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210315174543.104002-1-jagan@amarulasolutions.com> References: <20210315174543.104002-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=o+gWlahR; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Move the redundant config item like SPL, memory-related across all imx8mm config files in the common config header, imx8mm-common.h Verified the built files, seems almost the same as before. Cc: Tim Harvey Cc: Adam Ford Cc: Peng Fan Cc: Teresa Remmet Cc: Igor Opaniuk Signed-off-by: Jagan Teki --- Changes for v2: - add venice changes include/configs/imx8mm-common.h | 48 ++++++++++++++++++++++++++++++++ include/configs/imx8mm_beacon.h | 48 ++++---------------------------- include/configs/imx8mm_evk.h | 45 ++---------------------------- include/configs/imx8mm_venice.h | 46 ++++-------------------------- include/configs/phycore_imx8mm.h | 43 ++-------------------------- include/configs/verdin-imx8mm.h | 42 +++------------------------- 6 files changed, 68 insertions(+), 204 deletions(-) create mode 100644 include/configs/imx8mm-common.h diff --git a/include/configs/imx8mm-common.h b/include/configs/imx8mm-common.h new file mode 100644 index 0000000000..f1afa5c5a9 --- /dev/null +++ b/include/configs/imx8mm-common.h @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2019 NXP + * Copyright (c) 2020 Amarula Solutions(India) + */ + +#ifndef __IMX8MM_COMMON_H +#define __IMX8MM_COMMON_H + +#include +#include + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_MAX_SIZE (148 * 1024) +#define CONFIG_SPL_STACK 0x920000 +#define CONFIG_SPL_BSS_START_ADDR 0x910000 +#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K +#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 +#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K + +/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ +#define CONFIG_MALLOC_F_ADDR 0x930000 +/* For RAW image gives a error info not panic */ +#define CONFIG_SPL_ABORT_ON_RAW_IMAGE +#endif /* CONFIG_SPL_BUILD */ + +#define CONFIG_SYS_MONITOR_LEN SZ_512K +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 +#define CONFIG_SYS_UBOOT_BASE \ + (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) + +#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN SZ_32M + +#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define PHYS_SDRAM 0x40000000 + +#define CONFIG_LOADADDR 0x40480000 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#endif /* __IMX8MM_COMMON_H */ diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h index 94f4a1232f..65a44a9ed9 100644 --- a/include/configs/imx8mm_beacon.h +++ b/include/configs/imx8mm_beacon.h @@ -6,29 +6,13 @@ #ifndef __IMX8MM_BEACON_H #define __IMX8MM_BEACON_H -#include -#include +#define CONFIG_SYS_INIT_RAM_SIZE 0x200000 +#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ -#define CONFIG_SPL_MAX_SIZE (148 * 1024) -#define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 -#define CONFIG_SYS_UBOOT_BASE \ - (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) +#include "imx8mm-common.h" -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_STACK 0x920000 -#define CONFIG_SPL_BSS_START_ADDR 0x910000 -#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */ -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ - -/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ -#define CONFIG_MALLOC_F_ADDR 0x930000 -/* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE - -#endif +#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1)) /* Initial environment variables */ #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -92,28 +76,6 @@ "fi; " \ "fi;" -/* Link Definitions */ -#define CONFIG_LOADADDR 0x40480000 - -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR - -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x200000 -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - -/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN SZ_32M - -#define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define PHYS_SDRAM 0x40000000 -#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ - -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1)) - #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR /* Monitor Command Prompt */ diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h index fd9a6cbb8c..d74bc2ea4f 100644 --- a/include/configs/imx8mm_evk.h +++ b/include/configs/imx8mm_evk.h @@ -6,31 +6,11 @@ #ifndef __IMX8MM_EVK_H #define __IMX8MM_EVK_H -#include -#include -#include - #define CONFIG_SYS_BOOTM_LEN (32 * SZ_1M) -#define CONFIG_SPL_MAX_SIZE (148 * 1024) -#define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 -#define CONFIG_SYS_UBOOT_BASE \ - (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) - -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_STACK 0x920000 -#define CONFIG_SPL_BSS_START_ADDR 0x910000 -#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */ -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ - -/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ -#define CONFIG_MALLOC_F_ADDR 0x930000 -/* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE +#define CONFIG_SYS_INIT_RAM_SIZE 0x200000 +#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ -#endif +#include "imx8mm-common.h" #ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ @@ -56,27 +36,8 @@ "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ -/* Link Definitions */ -#define CONFIG_LOADADDR 0x40480000 - -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR - -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x200000 -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - #define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ -/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN SZ_32M - -#define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define PHYS_SDRAM 0x40000000 -#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ - #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR /* Monitor Command Prompt */ diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h index a406e91c84..bcd59628f6 100644 --- a/include/configs/imx8mm_venice.h +++ b/include/configs/imx8mm_venice.h @@ -6,29 +6,13 @@ #ifndef __IMX8MM_VENICE_H #define __IMX8MM_VENICE_H -#include -#include +#define CONFIG_SYS_INIT_RAM_SIZE SZ_2M -#define CONFIG_SPL_MAX_SIZE (148 * 1024) -#define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 -#define CONFIG_SYS_UBOOT_BASE \ - (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) - -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_STACK 0x920000 -#define CONFIG_SPL_BSS_START_ADDR 0x910000 -#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */ -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ - -/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ -#define CONFIG_MALLOC_F_ADDR 0x930000 -/* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE +/* SDRAM configuration */ +#define PHYS_SDRAM_SIZE SZ_1G /* 1GB DDR */ +#define CONFIG_SYS_BOOTM_LEN SZ_256M -#endif +#include "imx8mm-common.h" #define MEM_LAYOUT_ENV_SETTINGS \ "fdt_addr_r=0x44000000\0" \ @@ -36,10 +20,6 @@ "ramdisk_addr_r=0x46400000\0" \ "scriptaddr=0x46000000\0" -/* Link Definitions */ -#define CONFIG_LOADADDR 0x40480000 -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR - /* Enable Distro Boot */ #ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ @@ -80,22 +60,6 @@ "gzwrite mmc $dev $loadaddr $filesize\0" \ "erase_env=mmc dev $dev; mmc erase 0x7f08 0x40\0" -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE SZ_2M -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - -/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN SZ_32M -#define CONFIG_SYS_SDRAM_BASE 0x40000000 - -/* SDRAM configuration */ -#define PHYS_SDRAM 0x40000000 -#define PHYS_SDRAM_SIZE SZ_1G /* 1GB DDR */ -#define CONFIG_SYS_BOOTM_LEN SZ_256M - /* UART */ #define CONFIG_MXC_UART_BASE UART2_BASE_ADDR diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h index fd69dc41a8..86f4ee3f23 100644 --- a/include/configs/phycore_imx8mm.h +++ b/include/configs/phycore_imx8mm.h @@ -7,30 +7,11 @@ #ifndef __PHYCORE_IMX8MM_H #define __PHYCORE_IMX8MM_H -#include -#include -#include - #define CONFIG_SYS_BOOTM_LEN SZ_64M -#define CONFIG_SPL_MAX_SIZE (148 * SZ_1K) -#define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 -#define CONFIG_SYS_UBOOT_BASE \ - (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) - -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_STACK 0x920000 -#define CONFIG_SPL_BSS_START_ADDR 0x910000 -#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K +#define CONFIG_SYS_INIT_RAM_SIZE SZ_512K +#define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ -/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ -#define CONFIG_MALLOC_F_ADDR 0x930000 -/* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE -#endif +#include "imx8mm-common.h" #define CONFIG_EXTRA_ENV_SETTINGS \ "image=Image\0" \ @@ -81,26 +62,8 @@ "fi; " \ "fi;" -/* Link Definitions */ -#define CONFIG_LOADADDR 0x40480000 -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR - -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE SZ_512K -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - #define CONFIG_MMCROOT "/dev/mmcblk2p2" /* USDHC3 */ -/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN SZ_32M -#define CONFIG_SYS_SDRAM_BASE 0x40000000 - -#define PHYS_SDRAM SZ_1G -#define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ - /* UART */ #define CONFIG_MXC_UART_BASE UART3_BASE_ADDR diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h index 4751bf5a5a..5485bc23aa 100644 --- a/include/configs/verdin-imx8mm.h +++ b/include/configs/verdin-imx8mm.h @@ -6,28 +6,12 @@ #ifndef __VERDIN_IMX8MM_H #define __VERDIN_IMX8MM_H -#include -#include - -#define CONFIG_SPL_MAX_SIZE (148 * 1024) -#define CONFIG_SYS_MONITOR_LEN SZ_512K -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 -#define CONFIG_SYS_UBOOT_BASE \ - (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) +#define CONFIG_SYS_INIT_RAM_SIZE SZ_2M -#ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_STACK 0x920000 -#define CONFIG_SPL_BSS_START_ADDR 0x910000 -#define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */ -#define CONFIG_SYS_SPL_MALLOC_START 0x42200000 -#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */ +/* SDRAM configuration */ +#define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ -/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ -#define CONFIG_MALLOC_F_ADDR 0x930000 -/* For RAW image gives a error info not panic */ -#define CONFIG_SPL_ABORT_ON_RAW_IMAGE -#endif +#include "imx8mm-common.h" #define MEM_LAYOUT_ENV_SETTINGS \ "fdt_addr_r=0x44000000\0" \ @@ -35,9 +19,6 @@ "ramdisk_addr_r=0x46400000\0" \ "scriptaddr=0x46000000\0" -#define CONFIG_LOADADDR 0x40480000 -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR - /* Enable Distro Boot */ #ifndef CONFIG_SPL_BUILD #define BOOT_TARGET_DEVICES(func) \ @@ -75,25 +56,10 @@ "${blkcnt} / 0x200; mmc dev 0 1; mmc write ${loadaddr} 0x2 " \ "${blkcnt}; fi\0" -#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000 -#define CONFIG_SYS_INIT_RAM_SIZE SZ_2M -#define CONFIG_SYS_INIT_SP_OFFSET \ - (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_ADDR \ - (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) - #if defined(CONFIG_ENV_IS_IN_MMC) /* Environment in eMMC, before config block at the end of 1st "boot sector" */ #endif -/* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN SZ_32M -#define CONFIG_SYS_SDRAM_BASE 0x40000000 - -/* SDRAM configuration */ -#define PHYS_SDRAM 0x40000000 -#define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ - /* UART */ #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR