@@ -13,6 +13,12 @@
u-boot,spl-boot-order = &emmc, &sdmmc;
};
+ dmc {
+ u-boot,dm-pre-reloc;
+ compatible = "rockchip,px30-dmc", "syscon";
+ reg = <0x0 0xff2a0000 0x0 0x1000>;
+ };
+
rng: rng@ff0b0000 {
compatible = "rockchip,cryptov2-rng";
reg = <0x0 0xff0b0000 0x0 0x4000>;
@@ -20,10 +26,6 @@
};
};
-&dmc {
- u-boot,dm-pre-reloc;
-};
-
&uart2 {
clock-frequency = <24000000>;
u-boot,dm-pre-reloc;
@@ -151,11 +151,6 @@
interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
};
- dmc: dmc {
- compatible = "rockchip,px30-dmc", "syscon";
- reg = <0x0 0xff2a0000 0x0 0x1000>;
- };
-
display_subsystem: display-subsystem {
compatible = "rockchip,display-subsystem";
ports = <&vopb_out>, <&vopl_out>;
@@ -16,6 +16,12 @@
serial2 = &uart2;
spi0 = &sfc;
};
+
+ dmc {
+ u-boot,dm-pre-reloc;
+ compatible = "rockchip,px30-dmc", "syscon";
+ reg = <0x0 0xff2a0000 0x0 0x1000>;
+ };
};
/* U-Boot clk driver for px30 cannot set GPU_CLK */
@@ -32,10 +38,6 @@
<100000000>, <17000000>;
};
-&dmc {
- u-boot,dm-pre-reloc;
-};
-
&gpio0 {
u-boot,dm-pre-reloc;
};