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[209.85.220.41]) by mx.google.com with SMTPS id r15sor2307513wrq.29.2021.11.11.07.23.04 for (Google Transport Security); Thu, 11 Nov 2021 07:23:04 -0800 (PST) Received-SPF: pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a5d:4ed1:: with SMTP id s17mr9822339wrv.310.1636644183891; Thu, 11 Nov 2021 07:23:03 -0800 (PST) Received: from panicking.pdxnet.pdxeng.ch ([5.171.215.77]) by smtp.gmail.com with ESMTPSA id f3sm8973683wmb.12.2021.11.11.07.23.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Nov 2021 07:23:03 -0800 (PST) From: Michael Trimarchi To: Ariel D'Alessandro Cc: linux-amarula@amarulasolutions.com, Anthony Brandon Subject: [PATCH 03/11] soc: codecs: tlv320aic31xx: Add support for external optional clock mclk Date: Thu, 11 Nov 2021 16:22:50 +0100 Message-Id: <20211111152258.26131-3-michael@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211111152258.26131-1-michael@amarulasolutions.com> References: <20211111152258.26131-1-michael@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: michael@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=SRkcD+dw; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Need to be sure that clock connected to the codec is enable during the codec probe. Signed-off-by: Michael Trimarchi --- sound/soc/codecs/tlv320aic31xx.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/sound/soc/codecs/tlv320aic31xx.c b/sound/soc/codecs/tlv320aic31xx.c index 6b54811be1ca..f1a758fe07ce 100644 --- a/sound/soc/codecs/tlv320aic31xx.c +++ b/sound/soc/codecs/tlv320aic31xx.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -162,6 +163,7 @@ struct aic31xx_priv { u8 i2c_regs_status; struct device *dev; struct regmap *regmap; + struct clk *clk; enum aic31xx_type codec_type; struct gpio_desc *gpio_reset; int micbias_vg; @@ -1346,6 +1348,21 @@ static int aic31xx_codec_probe(struct snd_soc_component *component) aic31xx->component = component; + aic31xx->clk = devm_clk_get_optional(component->dev, "mclk"); + if (IS_ERR(aic31xx->clk)) { + dev_err(component->dev, "failed to get the clock: %ld\n", + PTR_ERR(aic31xx->clk)); + return -EINVAL; + } + + aic31xx->sysclk = clk_get_rate(aic31xx->clk); + + ret = clk_prepare_enable(aic31xx->clk); + if (ret) { + dev_err(component->dev, "unable to enable mclk\n"); + return ret; + } + for (i = 0; i < ARRAY_SIZE(aic31xx->supplies); i++) { aic31xx->disable_nb[i].nb.notifier_call = aic31xx_regulator_event; @@ -1380,8 +1397,16 @@ static int aic31xx_codec_probe(struct snd_soc_component *component) return 0; } +static void aic31xx_codec_remove(struct snd_soc_component *component) +{ + struct aic31xx_priv *aic31xx = snd_soc_component_get_drvdata(component); + + clk_disable_unprepare(aic31xx->clk); +} + static const struct snd_soc_component_driver soc_codec_driver_aic31xx = { .probe = aic31xx_codec_probe, + .remove = aic31xx_codec_remove, .set_jack = aic31xx_set_jack, .set_bias_level = aic31xx_set_bias_level, .controls = common31xx_snd_controls,