From patchwork Thu Nov 11 15:22:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Nazzareno Trimarchi X-Patchwork-Id: 1745 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-wm1-f72.google.com (mail-wm1-f72.google.com [209.85.128.72]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id BD3E13F07B for ; Thu, 11 Nov 2021 16:23:08 +0100 (CET) Received: by mail-wm1-f72.google.com with SMTP id b133-20020a1c808b000000b0032cdd691994sf4951500wmd.1 for ; Thu, 11 Nov 2021 07:23:08 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1636644188; cv=pass; d=google.com; s=arc-20160816; b=gh7IMKfF7e/ofLXNipYZIJ0S9L9eqXPl/PbV0gNFJ4FtXVbVluTfbDeLfrxfQWjrVE xRWKLdsQoqm553viY4U3mI1B5aA2eDG2gr0WdJtTIoSP+XTNY4J0uV0znyEQBtba4jkZ xHhuM3Ah+JWGH+NElMNmx7g3T/r719ocIxfb6+z1hkr+/niC1x1AxwR6T+lXWdt+2Nfm rF/IyyeyL5qU7elPFbptNmucpUuECgwze4hcdB4bPikDdXTXQhh0ybkc7+wx+TzqF9l4 3hKQU/uDCxDeFzlGknveBLc+MEphftZaWIp1z+GovWp2RIiYzbOboryoIcTTzKDSl5Kp Dc6g== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=CdzT0YAF15B9ddcIOJ4P8KD1jy2WHt0l3i8u99M97QM=; b=yu6j8DphJ+r0rQ1lyqcAEFe5iBwV6Xb8JVI8e8CRKgJTV7a6UHQTcWzsBdLTh7NrFz fYifMhcNDeCIUmJfziz/vhN4ptvvBhgi5FBvju8sT43hNuUSpsllnbGe7Wm//GZFIM9d DbvM1QiK6XtMGi5YMPCryDB9Vd2GMehACzs2bXWznfvFgdxN9WnqHDE0B/2gut+zLJL6 Q67zOX6nQTyCr6tv+fFD+oVrnhIjThQcPLlu1CNn7I3OrUv0OYQ6XnPhbmPz5SiBEUYv k/JWIm84j+zLMxN+8dNBRY8OrNRnFHpWRhKGTVgMYclh7C/F4jndEj3D6VtdSLv9PrF5 ceHg== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=SaVq9FK1; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=CdzT0YAF15B9ddcIOJ4P8KD1jy2WHt0l3i8u99M97QM=; b=qNydLdG08o5RHJwPOScUKtNZWk6se1QZPyBbZqPU0hArMTXQbQE33MmgvOWaH7ZLRZ LkVXIzR/CkB11GAwPIfrnOSGPqi4NnBu58DMSf201iDy4Fhggn7AickR2px7j7S9cA27 S3it9q1pQszgV2tsOge+HnXhFSc+15k8ziPvs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=CdzT0YAF15B9ddcIOJ4P8KD1jy2WHt0l3i8u99M97QM=; b=tnzjP9ES/KmFbDEwzfCjgECg02Qp6T7WmyyqSpH2yXmfATd4i1DWEwEvq+wjVf0FaH +sUKTaY+H+rb4qTtWVkgHxAa3LwgJYqqW8L4C7dZo5Yo98heuboz3YlEwPQ2n7emt01A QihJANikaqywdSucr8OqGvPaHDF2WnP1W5ge1ht4791JVzrC6h7ZKl6li3Ww3d+R3HPE CetqVMuzcgjM0cU1MLN/ygx+WV/3JrN/nYemglA8CltsYgtrW3bwH1949rkDi3TbcpfU yhvBP2opM2ouGdrqRARzL4yBIK8FvqKbhkhChSzhuDrZJvZJCkWIV6eyzgosK0m1nj3j kf/Q== X-Gm-Message-State: AOAM532fM7yZEpQ/nVnQ7DD2bDcnRCgrPoC4/3Q3STA4AEAFV5FDtQ7s 6q18EA7/keE7vLyWYe1FLMqjukHU X-Google-Smtp-Source: ABdhPJyGOIfDyJ3/UhG1Z6yz7upLBYOvZzCcrff0QTSsd8YQhuOZa8zK1GVlvziefMqoCffjtgYnQg== X-Received: by 2002:adf:ecca:: with SMTP id s10mr9673478wro.405.1636644188451; Thu, 11 Nov 2021 07:23:08 -0800 (PST) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a1c:23c8:: with SMTP id j191ls1708002wmj.1.gmail; Thu, 11 Nov 2021 07:23:07 -0800 (PST) X-Received: by 2002:a05:600c:4104:: with SMTP id j4mr8926254wmi.178.1636644187370; Thu, 11 Nov 2021 07:23:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1636644187; cv=none; d=google.com; s=arc-20160816; b=oxu99NyzdkRcOfqTTFz+f4/qtHgBx2G96mPqwn724AokoSnMS6xd9zeEIKesZmhYxG t2V6E1LteHmtc0NjbK+4fcXRdVCs3XFf3+GMWixvIz7KBc/mFDka447yudT9CRzQbzNr 7Yz05fKMR8XuBL1wyaRhO+0MhYRNBGJgXhA0fji+zcIyOPkg2ujD+gApmB78FqBw7JLF qHszD5xD4wIfpsHMIihPs8ntKzOHKGuQx/AykPqUsQs25dQploIMzfoCJ6xjb0t8GeXT 9rovkyksR5GQxfUVco6NgzlZttmGdJhpxmcmz+r7RzXEa0d9ds3TjHlUqCEpCLI8obVY bPEQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=/57MPDT/LnfMVYe/0IMID8HF9EYxmuZOmPC6vNxqAbs=; b=dR3F/jSV1PaO22iTyrq9gGLVadxpAuDV+jtVTVvGpXmLdpLQ9YpWQ/tT+KZuEa8C5f 8ZCr1yVyN3QN+YO1YoRtccY2ZtW4YEK0rczRcPNPggkC8dS4ZLR0TMAcF94VFgqvvZ2f Pj2ldGmk5feyYUZpeAp/w5eBroHYCGZN7d9UoBcuycwEMsoZmQls3+4jTBH3JKT5zJ4O Iik4AD72BExUrZ8RNi0D4fbuTsgm61JBSBuBbc8KPzvxv5otpCeSzISle0yxzZpTnVT4 jBdglmpgCLq39V29yAKwMk58Typ6X6An/kj+2gbH8n/wKVxMfDKFVgFeQlIp0olbaYu3 r0Ag== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=SaVq9FK1; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com Received: from mail-sor-f41.google.com (mail-sor-f41.google.com. [209.85.220.41]) by mx.google.com with SMTPS id m32sor6282665wms.14.2021.11.11.07.23.07 for (Google Transport Security); Thu, 11 Nov 2021 07:23:07 -0800 (PST) Received-SPF: pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a1c:f002:: with SMTP id a2mr26058557wmb.79.1636644186985; Thu, 11 Nov 2021 07:23:06 -0800 (PST) Received: from panicking.pdxnet.pdxeng.ch ([5.171.215.77]) by smtp.gmail.com with ESMTPSA id f3sm8973683wmb.12.2021.11.11.07.23.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Nov 2021 07:23:06 -0800 (PST) From: Michael Trimarchi To: Ariel D'Alessandro Cc: linux-amarula@amarulasolutions.com, Anthony Brandon Subject: [PATCH 05/11] arm64: dts: imx8mn-bsh-smm2-pro: Register sound-tlv320aic31xx audio card Date: Thu, 11 Nov 2021 16:22:52 +0100 Message-Id: <20211111152258.26131-5-michael@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211111152258.26131-1-michael@amarulasolutions.com> References: <20211111152258.26131-1-michael@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: michael@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=SaVq9FK1; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add the registration of audio card based on tlv320aic31xx family codec. The audio card expose two playback device. One of them use the easrc that let you use all the frequency. In order to properly works the sdma and easrc firmware must be loaded and installed in the filesystem. The card can support only S32_LE and 48Khz and this is configured in easrc node Signed-off-by: Michael Trimarchi --- .../freescale/imx8mn-bsh-smm-s2-common.dtsi | 6 +- .../dts/freescale/imx8mn-bsh-smm-s2pro.dts | 93 +++++++++++++++++++ 2 files changed, 96 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi index 108a29d4e7ae..038a7368be86 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi @@ -128,7 +128,7 @@ buck3_reg: BUCK3 { buck4_reg: BUCK4 { /* PMIC_BUCK6 - VDD_3V3 */ regulator-name = "buck4"; - regulator-min-microvolt = <3000000>; + regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; @@ -137,8 +137,8 @@ buck4_reg: BUCK4 { buck5_reg: BUCK5 { /* PMIC_BUCK7 - VDD_1V8 */ regulator-name = "buck5"; - regulator-min-microvolt = <1605000>; - regulator-max-microvolt = <1995000>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts index c6a8ed6745c1..0328e48e3f92 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts +++ b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2pro.dts @@ -7,6 +7,7 @@ /dts-v1/; #include "imx8mn-bsh-smm-s2-common.dtsi" +#include / { model = "BSH SMM S2 PRO"; @@ -16,6 +17,68 @@ memory@40000000 { device_type = "memory"; reg = <0x0 0x40000000 0x0 0x20000000>; }; + + sound-tlv320aic31xx { + compatible = "bsh,imx-audio-tlv320aic31xx"; + model = "tlv320aic31xx-hifi"; + audio-cpu = <&sai3>; + audio-codec = <&codec>; + audio-asrc = <&easrc>; + audio-routing = + "Ext Spk", "SPL", + "Ext Spk", "SPR"; + }; + + vdd_input: vdd_input { + compatible = "regulator-fixed"; + regulator-name = "vdd_input"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; +}; + +&easrc { + fsl,asrc-rate = <48000>; + fsl,asrc-format = <10>; + status = "okay"; +}; + +&i2c2 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + codec: tlv320dac3101@18 { + #sound-dai-cells = <0>; + compatible = "ti,tlv320dac3101"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_dac_rst>; + reg = <0x18>; + + ai31xx-micbias-vg = ; + + HPVDD-supply = <&buck4_reg>; + SPRVDD-supply = <&vdd_input>; + SPLVDD-supply = <&vdd_input>; + AVDD-supply = <&buck4_reg>; + IOVDD-supply = <&buck4_reg>; + DVDD-supply = <&buck5_reg>; + reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; + + clocks = <&clk IMX8MN_CLK_SAI3_ROOT>; + clock-names = "mclk"; + }; +}; + +&sai3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sai3>; + assigned-clocks = <&clk IMX8MN_CLK_SAI3>; + assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>; + assigned-clock-rates = <24576000>; + fsl,sai-mclk-direction-output; + status = "okay"; }; /* eMMC */ @@ -30,6 +93,36 @@ &usdhc1 { }; &iomuxc { + pinctrl_dac_rst: dac_rst { + fsl,pins = < + MX8MN_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x19 /* DAC_RST */ + >; + }; + + pinctrl_espi2: espi2grp { + fsl,pins = < + MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x082 + MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x082 + MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x082 + MX8MN_IOMUXC_ECSPI2_SS0_ECSPI2_SS0 0x040 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL 0x400000c3 + MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA 0x400000c3 + >; + }; + + pinctrl_sai3: sai3grp { + fsl,pins = < + MX8MN_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6 + MX8MN_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6 + MX8MN_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6 + >; + }; + pinctrl_usdhc1: usdhc1grp { fsl,pins = < MX8MN_IOMUXC_SD1_CLK_USDHC1_CLK 0x40000090