From patchwork Thu Nov 11 15:22:55 2021
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
X-Patchwork-Submitter: Michael Trimarchi <michael@amarulasolutions.com>
X-Patchwork-Id: 1748
Return-Path: 
 <linux-amarula+bncBCXK73FY3AFRBYPKWSGAMGQEPTC3CQY@amarulasolutions.com>
X-Original-To: linux-amarula@patchwork.amarulasolutions.com
Delivered-To: linux-amarula@patchwork.amarulasolutions.com
Received: from mail-wm1-f70.google.com (mail-wm1-f70.google.com
	[209.85.128.70])
	by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 967253F07B
	for <linux-amarula@patchwork.amarulasolutions.com>;
	Thu, 11 Nov 2021 16:23:13 +0100 (CET)
Received: by mail-wm1-f70.google.com with SMTP id
	o18-20020a05600c511200b00332fa17a02esf2846359wms.5
	for <linux-amarula@patchwork.amarulasolutions.com>;
	Thu, 11 Nov 2021 07:23:13 -0800 (PST)
ARC-Seal: i=2; a=rsa-sha256; t=1636644193; cv=pass;
	d=google.com; s=arc-20160816;
	b=dpwS0lWnnGWCrmgZN9Zjtjn9axXGsppCO2QMfIhXcsvkRynmJpP9CieNfnX2lkXS4H
	K0BUDrVzUrv4eshKOukd4gPoTXJoXzYRf1Ep5MapILdRsUu9BApGYHLO8WeNy8mj3snM
	UZU0XM259eXqS24al7CXDDWZfXtfAOdru2ktrJJtH+gfO7wYIthETNHc2WKDFjKF/Sgs
	SFDzt6wNvPLITCVX8dYWIp0LTS30Bp/vPvNxMLUGU16vFyG5/Q6mGjBoCDhlPIh6DPnz
	z5cEH7BkKqeZfWdc8WkCBNyi67ugFIvR2sH3+0ZPjjPuCDZHZPDnZbBhhdaPYjniHT3b
	/2nA==
ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com;
	s=arc-20160816;
	h=list-unsubscribe:list-archive:list-help:list-post:list-id
	:mailing-list:precedence:mime-version:references:in-reply-to
	:message-id:date:subject:cc:to:from:dkim-signature;
	bh=KQqanUIKRGPN5u5YEDDitXh/fXFtQXbUkmkhPley8Pw=;
	b=Bk8C2pwyIEVy5Rooofx0qGCvfUv8nxAM7c0HKLFMZtGi39yYAo+5Jfn2zgSJqJM2s+
	N754fe057ho+r7rpRnumi57r1onnuq2JMpeuilSMK8Bk3Yd5IH+zHHolY9n9YvgIz+N+
	qei3gokW7IdRuZsEWU/tP7EoVRJTTro9Rcy2BFn96Cwrw+F8beUHCuDJ7Zsrepisvmao
	Eaoc2QBuJUUda0JVQ9+VzoXFVq2IA3Wf+F10Ro2BSgvG/EuQCdmw0sAkzsBJqiTKqYSY
	d1SWwvjNyQPvrxBHOa72yBEFRaPmFfNNwGBgnaPo6eZ89YB2QS/YzpnTFpYXJ0Epo+1n
	xt8w==
ARC-Authentication-Results: i=2; mx.google.com;
	dkim=pass header.i=@amarulasolutions.com header.s=google
	header.b="rJRA/r67";
	spf=pass (google.com: domain of michael@amarulasolutions.com
	designates 209.85.220.41 as permitted sender)
	smtp.mailfrom=michael@amarulasolutions.com
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed;
	d=amarulasolutions.com; s=google;
	h=from:to:cc:subject:date:message-id:in-reply-to:references
	:mime-version:x-original-sender:x-original-authentication-results
	:precedence:mailing-list:list-id:list-post:list-help:list-archive
	:list-unsubscribe;
	bh=KQqanUIKRGPN5u5YEDDitXh/fXFtQXbUkmkhPley8Pw=;
	b=e8u4Uwwk0dJxloLtJkmDwjCMleDfasEVnNn1k8nYyuChOuiRG8xQ0OIkluhE3029XV
	2j7R1Yawn9yGYnspehQjrAGr6qZ2PsgB9zoaUjzOwV94uIGs4VF+0Gbr4j1o4fUZwv6L
	LRm8QcPMFI0R+VnqlvdbmXKEoIxbEsYGT3ufo=
X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed;
	d=1e100.net; s=20210112;
	h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to
	:references:mime-version:x-original-sender
	:x-original-authentication-results:precedence:mailing-list:list-id
	:x-spam-checked-in-group:list-post:list-help:list-archive
	:list-unsubscribe;
	bh=KQqanUIKRGPN5u5YEDDitXh/fXFtQXbUkmkhPley8Pw=;
	b=CbkOFYlzYy2watYjj7rzUQTLnvXl+5pzJzzSNF2aCGiiKHgIthE9/cn0e0CdDIED96
	ps/v4tVuYCtqDvKufOqs6I7hhqcINzLlqzcRmvM7U1ueojlKWPcKQAQjjv+xodMqYz0m
	DR5sqhQ/cQo9Q9xTXVnN0F75o1LB0sPUljLJvI626ezvenvBBQDRckJbNKDbiTP7UxQv
	QKEYVQYQ14gCAwVzq3n/PKeb2oTukYVTDSD+ISk5ku6zmeG2AeyOYJU0WGA8qZwayl/r
	QmfZVAWd0qKt8GQg7x1ZLFVqtg4VJdNDuDS4St26BD9tfSkj0C5L5wPdA5XKoy2TsOad
	aVjw==
X-Gm-Message-State: AOAM53382eoyiQlNSbUiDsV8nTaRrESn0MzgZsp3OS0n3Bhl1JVsWS1U
	0AeYhwdBv2xGu33AYK3ZD+lLAWty
X-Google-Smtp-Source: 
 ABdhPJzTJbpXu7j1o70RWV5OzLj9kPkFFkXNUJsf4lL6pBal7v0lt70VudYUB6qSCxOd4eipy1ZAzA==
X-Received: by 2002:a5d:48cf:: with SMTP id
	p15mr9646884wrs.277.1636644193345;
	Thu, 11 Nov 2021 07:23:13 -0800 (PST)
X-BeenThere: linux-amarula@amarulasolutions.com
Received: by 2002:a5d:4092:: with SMTP id o18ls2188075wrp.1.gmail;
	Thu, 11 Nov 2021 07:23:12 -0800 (PST)
X-Received: by 2002:adf:e848:: with SMTP id d8mr9671800wrn.3.1636644192349;
	Thu, 11 Nov 2021 07:23:12 -0800 (PST)
ARC-Seal: i=1; a=rsa-sha256; t=1636644192; cv=none;
	d=google.com; s=arc-20160816;
	b=wiD3xi/c4zkhHXOdwREN7aTkpk8kFowcdKcA3nlCqr+7Eh8kbKJwAg8siDyk3F9Kew
	7SvJCq+E2JaSY8AMSCWAXTMj/fj8n2pN4/Ld702+qbXUecMsg+z0SMwS7XvDGEs8rGeE
	aDRgTcoNNca7Km625mK6FhIqbdAQRLYtJSH5Z4COXb73vmNliWOxOKABJj+hufSCmgAg
	qC4ccKFmdsg+qNgysn0MwEfoxzCseIUF4/bzyCuTQORzfM+BKk5qNznJwDpX7LY6GtCa
	S2uJXgvmuM3kWQt/eaUAf3vWe2eM8GA5dWkHC2Qfa8qu6STzA6Uig0Rz/gffaEK9Kflq
	pKHw==
ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com;
	s=arc-20160816;
	h=content-transfer-encoding:mime-version:references:in-reply-to
	:message-id:date:subject:cc:to:from:dkim-signature;
	bh=kG4p4t0GNhMc6vSdxbHA90k2Ua/G4bxUK2nIlAZ2vk4=;
	b=gYeHGwWupavNlRJ2NvEev+LkLoo0aHujR/TcDG76FPmorLpaNhFXZVd2JMcv7mKlJx
	AH/rPaBxa8YT71tJcndRpXvLXbazPM9BluTSzXmdsUkgvw1YebZ99Cu9i3TCiMsRGMvH
	3F6upWsAqaMvF8qrgpUw9HqxaZYus1+lQSgsufXgic+/0kGRCMAXvtHAsm7TtVnBlLIL
	dBry28oDzvb1JYokDxrjCQ92B9Xjm+r20bmlH31HiV0tN3sRmx5xjcb4WS8WvEUFDCMi
	gUjDeyp82NMyONFEsp7tza/j65UZn4dwKDAJyF4A2mTaHsjJTxBiuXENa0QP2ZaoIOtL
	poqg==
ARC-Authentication-Results: i=1; mx.google.com;
	dkim=pass header.i=@amarulasolutions.com header.s=google
	header.b="rJRA/r67";
	spf=pass (google.com: domain of michael@amarulasolutions.com
	designates 209.85.220.41 as permitted sender)
	smtp.mailfrom=michael@amarulasolutions.com
Received: from mail-sor-f41.google.com (mail-sor-f41.google.com.
	[209.85.220.41])
	by mx.google.com with SMTPS id x2sor6120050wmc.24.2021.11.11.07.23.12
	for <linux-amarula@amarulasolutions.com>
	(Google Transport Security); Thu, 11 Nov 2021 07:23:12 -0800 (PST)
Received-SPF: pass (google.com: domain of michael@amarulasolutions.com
	designates 209.85.220.41 as permitted sender)
	client-ip=209.85.220.41;
X-Received: by 2002:a05:600c:4e4a:: with SMTP id
	e10mr5118458wmq.176.1636644191942;
	Thu, 11 Nov 2021 07:23:11 -0800 (PST)
Received: from panicking.pdxnet.pdxeng.ch ([5.171.215.77])
	by smtp.gmail.com with ESMTPSA id
	f3sm8973683wmb.12.2021.11.11.07.23.10
	(version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);
	Thu, 11 Nov 2021 07:23:11 -0800 (PST)
From: Michael Trimarchi <michael@amarulasolutions.com>
To: Ariel D'Alessandro <ariel.dalessandro@collabora.com>
Cc: linux-amarula@amarulasolutions.com,
	Anthony Brandon <anthony@amarulasolutions.com>
Subject: [PATCH 08/11] drm/panel: Add Ilitek ILI9805 panel driver
Date: Thu, 11 Nov 2021 16:22:55 +0100
Message-Id: <20211111152258.26131-8-michael@amarulasolutions.com>
X-Mailer: git-send-email 2.25.1
In-Reply-To: <20211111152258.26131-1-michael@amarulasolutions.com>
References: <20211111152258.26131-1-michael@amarulasolutions.com>
MIME-Version: 1.0
X-Original-Sender: michael@amarulasolutions.com
X-Original-Authentication-Results: mx.google.com;       dkim=pass
	header.i=@amarulasolutions.com header.s=google header.b="rJRA/r67";
	spf=pass (google.com: domain of michael@amarulasolutions.com
	designates
	209.85.220.41 as permitted sender)
	smtp.mailfrom=michael@amarulasolutions.com
Content-Type: text/plain; charset="UTF-8"
Precedence: list
Mailing-list: list linux-amarula@amarulasolutions.com;
	contact linux-amarula+owners@amarulasolutions.com
List-ID: <linux-amarula.amarulasolutions.com>
X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com
X-Google-Group-Id: 476853432473
List-Post: 
 <https://groups.google.com/a/amarulasolutions.com/group/linux-amarula/post>,
	<mailto:linux-amarula@amarulasolutions.com>
List-Help: 
 <https://support.google.com/a/amarulasolutions.com/bin/topic.py?topic=25838>,
	<mailto:linux-amarula+help@amarulasolutions.com>
List-Archive: 
 <https://groups.google.com/a/amarulasolutions.com/group/linux-amarula/>
List-Unsubscribe: 
 <mailto:googlegroups-manage+476853432473+unsubscribe@googlegroups.com>,
	<https://groups.google.com/a/amarulasolutions.com/group/linux-amarula/subscribe>

The GPM1790A0 panel is based on the Ilitek ILI9805 Controller.
Add a driver for it.

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
 drivers/gpu/drm/panel/Kconfig                |   8 +
 drivers/gpu/drm/panel/Makefile               |   1 +
 drivers/gpu/drm/panel/panel-ilitek-ili9805.c | 286 +++++++++++++++++++
 3 files changed, 295 insertions(+)
 create mode 100644 drivers/gpu/drm/panel/panel-ilitek-ili9805.c

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index ee135b178235..fa3860f801bb 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -149,6 +149,14 @@ config DRM_PANEL_ILITEK_ILI9341
 	  QVGA (240x320) RGB panels. support serial & parallel rgb
 	  interface.
 
+config DRM_PANEL_ILITEK_ILI9805
+	tristate "Ilitek ILI9805-based panels"
+	depends on OF
+	depends on DRM_MIPI_DSI
+	help
+	  Say Y if you want to enable support for panels based on the
+	  Ilitek ILI9805 controller.
+
 config DRM_PANEL_ILITEK_ILI9881C
 	tristate "Ilitek ILI9881C-based panels"
 	depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index 9e80106f69dc..060a205d9cea 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) += panel-feixin-k101-im2ba02.o
 obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += panel-feiyang-fy07024di26a30d.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9341) += panel-ilitek-ili9341.o
+obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9805) += panel-ilitek-ili9805.o
 obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o
 obj-$(CONFIG_DRM_PANEL_INNOLUX_EJ030NA) += panel-innolux-ej030na.o
 obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) += panel-innolux-p079zca.o
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9805.c b/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
new file mode 100644
index 000000000000..2cf10f5c17d4
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9805.c
@@ -0,0 +1,286 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2020 BSH Hausgerate GmbH
+ */
+
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/errno.h>
+#include <linux/fb.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+
+#include <linux/gpio/consumer.h>
+#include <linux/regulator/consumer.h>
+
+#include <drm/drm_mipi_dsi.h>
+#include <drm/drm_modes.h>
+#include <drm/drm_panel.h>
+
+#include <video/mipi_display.h>
+
+#define ILI9805_EXTCMD_CMD_SET_ENABLE_REG	(0xff)
+#define ILI9805_SETEXTC_PARAMETER1		(0xff)
+#define ILI9805_SETEXTC_PARAMETER2		(0x98)
+#define ILI9805_SETEXTC_PARAMETER3		(0x05)
+
+#define ILI9805_INSTR(_delay, ...) { \
+		.delay = (_delay), \
+		.len = ARRAY_SIZE(((u8[]) {__VA_ARGS__} )), \
+		.data = (const u8 *)&(const u8 []){__VA_ARGS__} \
+	}
+
+struct ili9805_instr {
+	size_t len;
+	const u8 * const data;
+	u32 delay;
+};
+
+struct ili9805_desc {
+	const char *name;
+	const struct ili9805_instr *init;
+	const size_t init_length;
+	const struct drm_display_mode *mode;
+	u32 width_mm;
+	u32 height_mm;
+};
+
+struct ili9805 {
+	struct drm_panel	panel;
+	struct mipi_dsi_device	*dsi;
+	const struct ili9805_desc	*desc;
+
+	struct regulator	*power;
+	struct gpio_desc	*reset;
+};
+
+static const struct ili9805_instr gpm1780a0_init[] = {
+	ILI9805_INSTR(100, ILI9805_EXTCMD_CMD_SET_ENABLE_REG, ILI9805_SETEXTC_PARAMETER1,
+		      ILI9805_SETEXTC_PARAMETER2, ILI9805_SETEXTC_PARAMETER3),
+	ILI9805_INSTR(100, 0xFD, 0x0F, 0x10, 0x44, 0x00),
+	ILI9805_INSTR(0, 0xf8, 0x18, 0x02, 0x02, 0x18, 0x02, 0x02, 0x30, 0x00,
+		      0x00, 0x30, 0x00, 0x00, 0x30, 0x00, 0x00),
+	ILI9805_INSTR(0, 0xB8, 0x62),
+	ILI9805_INSTR(0, 0xF1, 0x00),
+	ILI9805_INSTR(0, 0xF2, 0x00, 0x58, 0x40),
+	ILI9805_INSTR(0, 0xF3, 0x60, 0x83, 0x04),
+	ILI9805_INSTR(0, 0xFC, 0x04, 0x0F, 0x01),
+	ILI9805_INSTR(0, 0xEB, 0x08, 0x0F),
+	ILI9805_INSTR(0, 0xe0, 0x00, 0x08, 0x0d, 0x0e, 0x0e, 0x0d, 0x0a, 0x08, 0x04,
+		      0x08, 0x0d, 0x0f, 0x0b, 0x1c, 0x14, 0x0a),
+	ILI9805_INSTR(0, 0xe1, 0x00, 0x08, 0x0d, 0x0e, 0x0e, 0x0d, 0x0a, 0x08, 0x04,
+		      0x08, 0x0d, 0x0f, 0x0b, 0x1c, 0x14, 0x0a),
+	ILI9805_INSTR(10, 0xc1, 0x13, 0x39, 0x19, 0x06),
+	ILI9805_INSTR(10, 0xc7, 0xe5),
+	ILI9805_INSTR(10, 0xB1, 0x00, 0x12, 0x14),
+	ILI9805_INSTR(10, 0xB4, 0x02),
+	ILI9805_INSTR(0, 0xBB, 0x14, 0x55),
+	ILI9805_INSTR(0, MIPI_DCS_SET_ADDRESS_MODE, 0x08),
+	ILI9805_INSTR(0, MIPI_DCS_SET_PIXEL_FORMAT, 0x77),
+	ILI9805_INSTR(0, 0x20),
+	ILI9805_INSTR(0, 0xB0, 0x01),
+	ILI9805_INSTR(0, 0xB6, 0x31, 0x00, 0xef),
+	ILI9805_INSTR(0, 0xDF, 0x23),
+	ILI9805_INSTR(0, 0xB9, 0x02, 0x00),
+};
+
+static inline struct ili9805 *panel_to_ili9805(struct drm_panel *panel)
+{
+	return container_of(panel, struct ili9805, panel);
+}
+
+static int ili9805_prepare(struct drm_panel *panel)
+{
+	struct ili9805 *ctx = panel_to_ili9805(panel);
+	unsigned int i;
+	int ret;
+
+	/* Power the panel */
+	ret = regulator_enable(ctx->power);
+	if (ret)
+		return ret;
+	msleep(5);
+
+	/* And reset it */
+	gpiod_set_value(ctx->reset, 1);
+	msleep(20);
+
+	gpiod_set_value(ctx->reset, 0);
+	msleep(20);
+
+	for (i = 0; i < ctx->desc->init_length; i++) {
+		const struct ili9805_instr *instr = &ctx->desc->init[i];
+
+		ret = mipi_dsi_dcs_write_buffer(ctx->dsi, instr->data, instr->len);
+		if (ret)
+			return ret;
+		if (instr->delay > 0)
+			msleep(instr->delay);
+	}
+
+	ret = mipi_dsi_dcs_exit_sleep_mode(ctx->dsi);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+static int ili9805_enable(struct drm_panel *panel)
+{
+	struct ili9805 *ctx = panel_to_ili9805(panel);
+
+	msleep(120);
+
+	mipi_dsi_dcs_set_display_on(ctx->dsi);
+
+	return 0;
+}
+
+static int ili9805_disable(struct drm_panel *panel)
+{
+	struct ili9805 *ctx = panel_to_ili9805(panel);
+
+	return mipi_dsi_dcs_set_display_off(ctx->dsi);
+}
+
+static int ili9805_unprepare(struct drm_panel *panel)
+{
+	struct ili9805 *ctx = panel_to_ili9805(panel);
+
+	mipi_dsi_dcs_enter_sleep_mode(ctx->dsi);
+	regulator_disable(ctx->power);
+	gpiod_set_value(ctx->reset, 1);
+
+	return 0;
+}
+
+static const struct drm_display_mode gpm1780a0_timing = {
+	.clock = 26227,
+
+	.hdisplay = 480,
+	.hsync_start = 480 + 10,
+	.hsync_end = 480 + 10 + 2,
+	.htotal = 480 + 10 + 2 + 36,
+
+	.vdisplay = 480,
+	.vsync_start = 480 + 2,
+	.vsync_end = 480 + 10 + 4,
+	.vtotal = 480 + 2 + 4 + 10,
+};
+
+static int ili9805_get_modes(struct drm_panel *panel,
+			      struct drm_connector *connector)
+{
+	struct ili9805 *ctx = panel_to_ili9805(panel);
+	struct drm_display_mode *mode;
+
+	mode = drm_mode_duplicate(connector->dev, ctx->desc->mode);
+	if (!mode) {
+		dev_err(&ctx->dsi->dev, "failed to add mode %ux%ux@%u\n",
+			ctx->desc->mode->hdisplay,
+			ctx->desc->mode->vdisplay,
+			drm_mode_vrefresh(ctx->desc->mode));
+		return -ENOMEM;
+	}
+
+	drm_mode_set_name(mode);
+
+	mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
+	drm_mode_probed_add(connector, mode);
+
+	connector->display_info.width_mm = mode->width_mm;
+	connector->display_info.height_mm = mode->height_mm;
+
+	return 1;
+}
+
+static const struct drm_panel_funcs ili9805_funcs = {
+	.prepare	= ili9805_prepare,
+	.unprepare	= ili9805_unprepare,
+	.enable		= ili9805_enable,
+	.disable	= ili9805_disable,
+	.get_modes	= ili9805_get_modes,
+};
+
+static int ili9805_dsi_probe(struct mipi_dsi_device *dsi)
+{
+	struct ili9805 *ctx;
+	int ret;
+
+	ctx = devm_kzalloc(&dsi->dev, sizeof(*ctx), GFP_KERNEL);
+	if (!ctx)
+		return -ENOMEM;
+	mipi_dsi_set_drvdata(dsi, ctx);
+	ctx->dsi = dsi;
+	ctx->desc = of_device_get_match_data(&dsi->dev);
+
+	drm_panel_init(&ctx->panel, &dsi->dev, &ili9805_funcs,
+		       DRM_MODE_CONNECTOR_DSI);
+
+	ctx->power = devm_regulator_get(&dsi->dev, "power");
+	if (IS_ERR(ctx->power)) {
+		dev_err(&dsi->dev, "Couldn't get our power regulator\n");
+		return PTR_ERR(ctx->power);
+	}
+
+	ctx->reset = devm_gpiod_get(&dsi->dev, "reset", GPIOD_OUT_LOW);
+	if (IS_ERR(ctx->reset)) {
+		dev_err(&dsi->dev, "Couldn't get our reset GPIO\n");
+		return PTR_ERR(ctx->reset);
+	}
+
+	ret = drm_panel_of_backlight(&ctx->panel);
+	if (ret)
+		return ret;
+
+	drm_panel_add(&ctx->panel);
+
+	dsi->format = MIPI_DSI_FMT_RGB888;
+	dsi->mode_flags = MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_VIDEO |
+			  MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM |
+			  MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
+	dsi->lanes = 2;
+
+	return mipi_dsi_attach(dsi);
+}
+
+static int ili9805_dsi_remove(struct mipi_dsi_device *dsi)
+{
+	struct ili9805 *ctx = mipi_dsi_get_drvdata(dsi);
+
+	mipi_dsi_detach(dsi);
+	drm_panel_remove(&ctx->panel);
+
+	return 0;
+}
+
+static const struct ili9805_desc gpm1780a0_desc = {
+	.init = gpm1780a0_init,
+	.init_length = ARRAY_SIZE(gpm1780a0_init),
+	.mode = &gpm1780a0_timing,
+	.width_mm = 65,
+	.height_mm = 65,
+};
+
+static const struct of_device_id ili9805_of_match[] = {
+	{ .compatible = "giantplus,gpm1790a0", .data = &gpm1780a0_desc },
+	{ }
+};
+MODULE_DEVICE_TABLE(of, ili9805_of_match);
+
+static struct mipi_dsi_driver ili9805_dsi_driver = {
+	.probe		= ili9805_dsi_probe,
+	.remove		= ili9805_dsi_remove,
+	.driver = {
+		.name		= "ili9805-dsi",
+		.of_match_table	= ili9805_of_match,
+	},
+};
+module_mipi_dsi_driver(ili9805_dsi_driver);
+
+MODULE_AUTHOR("Matthias Proske <Matthias.Proske@bshg.com>");
+MODULE_AUTHOR("Michael Trimarchi <michael@amarulasolutions.com>");
+MODULE_DESCRIPTION("Ilitek ILI9805 Controller Driver");
+MODULE_LICENSE("GPL v2");