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[209.85.220.41]) by mx.google.com with SMTPS id ne19sor2141638ejc.22.2021.11.18.06.01.15 for (Google Transport Security); Thu, 18 Nov 2021 06:01:15 -0800 (PST) Received-SPF: pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a17:907:2d12:: with SMTP id gs18mr34064036ejc.126.1637244075158; Thu, 18 Nov 2021 06:01:15 -0800 (PST) Received: from panicking.amarulasolutions.com ([62.18.234.25]) by smtp.gmail.com with ESMTPSA id oz13sm1390477ejc.65.2021.11.18.06.01.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Nov 2021 06:01:14 -0800 (PST) From: Michael Trimarchi To: Ye Li , Stefano Babic , Fabio Estevam Cc: u-boot@lists.denx.de, Ariel D'Alessandro , linux-amarula@amarulasolutions.com, Anthony Brandon Subject: [PATCH V2] cmd_nandbcb: Support secondary boot address of imx8mn Date: Thu, 18 Nov 2021 15:01:12 +0100 Message-Id: <20211118140112.326532-1-michael@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" X-Original-Sender: michael@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=f1kqnWM2; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Add support of secondary boot address for imx8mn. The secondary boot address is hardcoded in the fuse. The value is calculated from there according to the following description: The fuse IMG_CNTN_SET1_OFFSET (0x490[22:19]) is defined as follows: • Secondary boot is disabled if fuse value is bigger than 10, n = fuse value bigger than 10. • n == 0: Offset = 4MB • n == 2: Offset = 1MB • Others & n <= 10 : Offset = 1MB*2^n • For FlexSPI boot, the valid values are: 0, 1, 2, 3, 4, 5, 6, and 7. Signed-off-by: Michael Trimarchi --- Changes V1->V2: - adjust commit message - drop and extra blank line --- arch/arm/mach-imx/cmd_nandbcb.c | 40 +++++++++++++++++++++++++++++++-- 1 file changed, 38 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-imx/cmd_nandbcb.c b/arch/arm/mach-imx/cmd_nandbcb.c index 09622c13c9..bd14b8583a 100644 --- a/arch/arm/mach-imx/cmd_nandbcb.c +++ b/arch/arm/mach-imx/cmd_nandbcb.c @@ -132,6 +132,7 @@ static struct platform_config imx8q_plat_config = { /* boot search related variables and definitions */ static int g_boot_search_count = 4; +static int g_boot_secondary_offset; static int g_boot_search_stride; static int g_pages_per_stride; @@ -275,9 +276,9 @@ static int nandbcb_set_boot_config(int argc, char * const argv[], boot_stream2_address = ((maxsize - boot_stream1_address) / 2 + boot_stream1_address); - if (boot_cfg->secondary_boot_stream_off_in_MB) + if (g_boot_secondary_offset) boot_stream2_address = - (loff_t)boot_cfg->secondary_boot_stream_off_in_MB * 1024 * 1024; + (loff_t)g_boot_secondary_offset * 1024 * 1024; max_boot_stream_size = boot_stream2_address - boot_stream1_address; @@ -1269,6 +1270,36 @@ static bool check_fingerprint(void *data, int fingerprint) return (*(int *)(data + off) == fingerprint); } +static int fuse_secondary_boot(u32 bank, u32 word, u32 mask, u32 off) +{ + int err; + u32 val; + int ret; + + err = fuse_read(bank, word, &val); + if (err) + return 0; + + val = (val & mask) >> off; + + if (val > 10) + return 0; + + switch (val) { + case 0: + ret = 4; + break; + case 1: + ret = 1; + break; + default: + ret = 2 << val; + break; + } + + return ret; +}; + static int fuse_to_search_count(u32 bank, u32 word, u32 mask, u32 off) { int err; @@ -1506,6 +1537,11 @@ static int do_nandbcb(struct cmd_tbl *cmdtp, int flag, int argc, g_boot_search_count); } + if ((plat_config.misc_flags) & FIRMWARE_SECONDARY_FIXED_ADDR) { + if (is_imx8mn()) + g_boot_secondary_offset = fuse_secondary_boot(2, 1, 0xff0000, 16); + } + cmd = argv[1]; --argc; ++argv;