From patchwork Tue Mar 22 06:56:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manoj Sai X-Patchwork-Id: 1881 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pf1-f198.google.com (mail-pf1-f198.google.com [209.85.210.198]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id CACB63F1DF for ; Tue, 22 Mar 2022 07:57:01 +0100 (CET) Received: by mail-pf1-f198.google.com with SMTP id 77-20020a621450000000b004fa8868a49esf4424631pfu.3 for ; Mon, 21 Mar 2022 23:57:01 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1647932220; cv=pass; d=google.com; s=arc-20160816; b=GRrlE48b5GV0Jo4C0+to8M95IDOcZpouu6YDR+DulyICIaj/24fiLadhzDuI/3vv6h /iK/XHgn3yd/ZnUuZ68qaL1681KTdl71qlN5TCnallhOt3vh9gM6+MXUTdQlwNfQhuFw blIW9a0wILJqgpZpU7GErTQLfIgK/LGt+o2ZKIN9oeAxeV2RE6BBHEIVqcTwOfST/xB2 4m08o7YXDmeTpil4LpO6pmyH1OhGhirNzDDi3A8AIhSVagB58pL6UxG316KIUP565AOQ JsAa15Q6GuxqRYcB9KdCaA8LCm/kI3+hkHrlNOzU4Pf4AxBkMdR8dQTCaaNfL49AUBal STeg== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=v9CAREwTQ8fhP0sJW4rMOPJ9yeBywsXBJhdpolfqRc0=; b=tzd9ffVno+NCEK5j1yOfwerL9f7ECXGLWitCTcthjFXpYhyEkOPfzs7zHUWqdo55kz ykUzeyu46kHz8Z1Lhy/hHpcDIiWFl0uvn5vV5xfpDMtR7yfMRlIGkyQxawVQLSgLd3Fh Tn2FNqueirX3l0UNRcbVCH5Ote11qzK6QMnjH/w4Op5egCwpmiBPK7Sy1bX0rilcZU7+ 6AcLMUrJnyA8vUy/4DYnruf/xGK/0DEH2gZfg85jLHnmVVDYSHWh6PxMaDSulX464ZB1 znwAX33VV4vL2kjqL8RCIxOs8KV1Y5/UN6RjdhRZtlKzlOk4zkS5GVmKX3fP9Vb7FcQC KXiQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=AGlDR2FR; spf=pass (google.com: domain of abbaraju.manojsai@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=abbaraju.manojsai@amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=v9CAREwTQ8fhP0sJW4rMOPJ9yeBywsXBJhdpolfqRc0=; b=cY+dDZM0PfG0fCjjVV0Aaq6dHPDS6Sgb3BFTVfaZalDe7x6Q/HwZgKUHIQHpC96k4m jZ3bEAyqcrCuEXmgQ26Gek1vO5jzJ+vYgD6jrFrYZ/XBfH40cwwR+nV1v3Fosm8SbTZs AlMg7RkzmW73VVdfzxoNsH2hMobXb/YdX5Y+Y= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=v9CAREwTQ8fhP0sJW4rMOPJ9yeBywsXBJhdpolfqRc0=; b=VHTsA5grqpCfBE85X6y2IeApWnE17oaR45L5drR7wbQMza+LIpBLtmfyl7NuR4SWFV Ux9C01d3nbBeXPwddkRNedx5XtP03wMHFP5m8zIEYawK6BZWdw0FZbao1JM/BsqyyCt7 g3fF8Wjsb12Uxy80VOvvZi4OlJG/fz8HetMOlBncBLZZiVQ88RL6qazTQuhKya49gT48 pgSpsMfaPDPuZKY6rXGMVh9koeHvPFr+i8U+wCXBQDnU+Wtn6yFdv+ePIJrx730xpCC7 VbL9nf1dQhjvvT7AIs1F6pOLBaoPKi/PsNYmo7lKyxoa+ccNJoVQPGmIloZsQNdAksJP gbqg== X-Gm-Message-State: AOAM531lcO7n8b33TThXrulLEOXvuHGsTYPOyyc76cuArEAebNAYdXjM XxgGXrb23WlOSLOnW/yShyuMFyt5 X-Google-Smtp-Source: ABdhPJxYxwLLmdbVHYh8qr5aC+GNU4Pr+iTLqyGFPkugESW+gINC0LA/jeCDplqOS4fQk47ThCWjIQ== X-Received: by 2002:a17:902:f701:b0:14d:7cea:82af with SMTP id h1-20020a170902f70100b0014d7cea82afmr16367550plo.71.1647932220660; Mon, 21 Mar 2022 23:57:00 -0700 (PDT) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a63:e005:0:b0:383:4ffa:a190 with SMTP id e5-20020a63e005000000b003834ffaa190ls634402pgh.8.gmail; Mon, 21 Mar 2022 23:57:00 -0700 (PDT) X-Received: by 2002:a05:6a00:21c8:b0:4c4:4bd:dc17 with SMTP id t8-20020a056a0021c800b004c404bddc17mr27557453pfj.57.1647932219958; Mon, 21 Mar 2022 23:56:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1647932219; cv=none; d=google.com; s=arc-20160816; b=BibxzL6/6wWx8xRUsJjYEdU+kMQg96zigLgX9I09OgcV7UDspBHX3e9oj1yeW1UNn5 OAUsD364Amea4/WyHI5du35xMKTjJSFqNq2+PQqQhCWXqRYQSuPjiI7VuTA/vgpddfpj 6uaPKv23ZW6zkFlHCZb8koqu52m5B0wcLXGyUkOdO8k7NUnmngA3YZozBgzKmbhmARlw jLrHq8B9UmtsvotZrbAdQ8Bsybe9/uTTNJVTSPHzOOjLNyJnERO8LZdI3Ol05RRiRut+ 1U05ybpWmtu3wenTzXDp9YqIrO2Z+SPhqZr48Eegvr+odWOCWMtMb3qA8DWnE9vfnDAq tjYA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=ujZyM2ltio7rv58hODte27TLuadkvQp7axqXBQcW5q0=; b=ych5bthF0Io2iJ0FePbkG7lwtCv3h4XSDRHtBgO7Ejq8YCcu3rMwrkaWxlueZ9J+0U rkq7evMyU4whOsg64D8HAalml4pqSlzlWrzoohpqOdN8u9bGZHSB1F8OyFZGYltmaZq5 h899ZLu18qrqGSl12o6yRuHQOhTcxwVRrUR0Dxos1HXXjU0EyqwjlDgR/jytirsBBgQQ W6MNLpcpKGavb7R84Ma+bOhokcxT/BBmdBKYxr42vIWN30uHiywXliMYyuaHAjVHQEHI xMqH353XGrMru3vWIMRJYkqS9iVC4HrStMAXbzULFOLKFSyWdmmmGEzddP1KwRq4k5bz DeDQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=AGlDR2FR; spf=pass (google.com: domain of abbaraju.manojsai@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=abbaraju.manojsai@amarulasolutions.com Received: from mail-sor-f41.google.com (mail-sor-f41.google.com. [209.85.220.41]) by mx.google.com with SMTPS id nv16-20020a17090b1b5000b001c7112c1a43sor712772pjb.15.2022.03.21.23.56.59 for (Google Transport Security); Mon, 21 Mar 2022 23:56:59 -0700 (PDT) Received-SPF: pass (google.com: domain of abbaraju.manojsai@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a17:90b:38cf:b0:1bf:42ee:6fa with SMTP id nn15-20020a17090b38cf00b001bf42ee06famr3260843pjb.9.1647932219615; Mon, 21 Mar 2022 23:56:59 -0700 (PDT) Received: from localhost.localdomain ([183.83.137.38]) by smtp.gmail.com with ESMTPSA id m11-20020a17090a3f8b00b001bc299e0aefsm1522749pjc.56.2022.03.21.23.56.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Mar 2022 23:56:59 -0700 (PDT) From: Manoj Sai To: Jagan Teki , Suniel Mahesh , Michael Nazzareno Trimarchi Cc: linux-amarula@amarulasolutions.com, Manoj Sai Subject: [PATCH v5 3/3] arm64: dts: imx8mp: Add Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit Date: Tue, 22 Mar 2022 12:26:41 +0530 Message-Id: <20220322065641.9307-3-abbaraju.manojsai@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220322065641.9307-1-abbaraju.manojsai@amarulasolutions.com> References: <20220322065641.9307-1-abbaraju.manojsai@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: abbaraju.manojsai@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=AGlDR2FR; spf=pass (google.com: domain of abbaraju.manojsai@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=abbaraju.manojsai@amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive Evaluation Board. Genaral features: - LCD 7" C.Touch - microSD slot - Ethernet 1Gb - Wifi/BT - 2x LVDS Full HD interfaces - 3x USB 2.0 - 1x USB 3.0 - HDMI Out - Plus PCIe - MIPI CSI - 2x CAN - Audio Out i.Core MX8M Plus is an EDIMM SoM based on NXP i.MX8M Plus from Engicam. i.Core MX8M Plus needs to mount on top of this Evaluation board for creating complete i.Core MX8M Plus EDIMM2.2 Starter Kit. Add support for it. Signed-off-by: Manoj Sai --- changes for v5 : - Fixed nodes in ascending order changes for v4 : - Fixed commit Message changes for v3 : - checked nodes and properties and updated as per comments changes for v2 : - checked nodes and properties --- --- arch/arm64/boot/dts/freescale/Makefile | 1 + .../freescale/imx8mp-icore-mx8mp-edimm2.2.dts | 230 ++++++++++++++++++ 2 files changed, 231 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-icore-mx8mp-edimm2.2.dts diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 7f51b537df40..66985eae4942 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -77,6 +77,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mn-tqma8mqnl-mba8mx.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-var-som-symphony.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-venice-gw7902.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-hummingboard-pulse.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8mp-icore-mx8mp-edimm2.2.dts b/arch/arm64/boot/dts/freescale/imx8mp-icore-mx8mp-edimm2.2.dts new file mode 100644 index 000000000000..882f82ac4d4b --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mp-icore-mx8mp-edimm2.2.dts @@ -0,0 +1,230 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 NXP + * Copyright (c) 2019 Engicam srl + * Copyright (c) 2020 Amarula Solutons(India) + */ + +/dts-v1/; + +#include "imx8mp.dtsi" +#include "imx8mp-icore-mx8mp.dtsi" +#include + +/ { + model = "Engicam i.Core MX8M Plus EDIMM2.2 Starter Kit"; + compatible = "engicam,icore-mx8mp-edimm2.2", "engicam,icore-mx8mp", + "fsl,imx8mp"; + chosen { + stdout-path = &uart2; + }; + + reg_usb1_host_vbus: regulator-usb1-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb1_host_vbus"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb1_vbus>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; + + reg_usdhc2_vmmc: regulator-usdhc2 { + compatible = "regulator-fixed"; + regulator-name = "VSD_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; + enable-active-high; + startup-delay-us = <100>; + off-on-delay-us = <12000>; + }; +}; + +/* Ethernet */ +&eqos { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_eqos>; + phy-mode = "rgmii-id"; + phy-handle = <ðphy0>; + status = "okay"; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@7 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <7>; + eee-broken-1000t; + }; + }; +}; + +&i2c3 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; +}; + +/* console */ +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +/* RS485 */ +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + assigned-clocks = <&clk IMX8MP_CLK_UART3>; + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>; + fsl,uart-has-rtscts; + status = "okay"; +}; + +&usb3_phy0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; +}; + +&usb_dwc3_0 { + dr_mode = "host"; + status = "okay"; +}; + +&usb3_phy1 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; + +&usb_dwc3_1 { + dr_mode = "host"; + status = "okay"; +}; + +/* SDCARD */ +&usdhc2 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; + cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; + vmmc-supply = <®_usdhc2_vmmc>; + no-1-8-v; + bus-width = <4>; + status = "okay"; +}; + +&iomuxc { + pinctrl_eqos: eqosgrp { + fsl,pins = < + MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x3 + MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x3 + MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x91 + MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x91 + MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x91 + MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x91 + MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x91 + MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x91 + MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x1f + MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x1f + MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x1f + MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x1f + MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x1f + MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x1f + MX8MP_IOMUXC_NAND_DATA01__GPIO3_IO07 0x19 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL 0x400001c3 + MX8MP_IOMUXC_I2C3_SDA__I2C3_SDA 0x400001c3 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x49 + MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x49 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x140 + MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x140 + MX8MP_IOMUXC_SD1_STROBE__UART3_DCE_CTS 0x140 + >; + }; + + pinctrl_usb1_vbus: usb1grp { + fsl,pins = < + MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14 0x19 + >; + }; + pinctrl_usdhc1_200mhz: usdhc1grp-200mhz { + fsl,pins = < + MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x196 + MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d6 + MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d6 + MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d6 + MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d6 + MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d6 + >; + }; + + pinctrl_usdhc2_gpio: usdhc2grp-gpio { + fsl,pins = < + MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190 + MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0 + MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0 + MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0 + MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0 + MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0 + MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 + >; + }; + + pinctrl_usdhc2_100mhz: usdhc2grp-100mhz { + fsl,pins = < + MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194 + MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4 + MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4 + MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4 + MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4 + MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4 + MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 + >; + }; + + pinctrl_usdhc2_200mhz: usdhc2grp-200mhz { + fsl,pins = < + MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196 + MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6 + MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6 + MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6 + MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6 + MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6 + MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1 + >; + }; +};