From patchwork Sun May 15 09:25:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Nazzareno Trimarchi X-Patchwork-Id: 1945 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-ed1-f71.google.com (mail-ed1-f71.google.com [209.85.208.71]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id AC2DD3F1F5 for ; Sun, 15 May 2022 11:25:48 +0200 (CEST) Received: by mail-ed1-f71.google.com with SMTP id cf16-20020a0564020b9000b00425d543c75dsf7782770edb.11 for ; Sun, 15 May 2022 02:25:48 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1652606748; cv=pass; d=google.com; s=arc-20160816; b=IvYFPx3dWI4DJMZflvSifVGI7vWBHVHGDmVj3SG2T2xwXlA1a7JxBBLY2Ni6eSK6mA MmX8w97JdTzfAw2ykhxZSoiIxF8XLYICTVWdyvbWuKu/PtNS4CpGKi7zVb/uT2uj9dHh QuMMYTA+aWRWio35N8Y/VNbnonP251BA5RS2xEpzyjjj3gxDgrLlJq5jD3IC/cnPz8TF gRIsdbir0XIrwMIn3JZO4HwmeskYShpc8kpdwB/8hQgq9UWmG+pwL5CX9cF06SXXPUwy YNPG6VZrqp24OM9WlXG6Bpg2oBt3ZrvLIjx51i8g6diN/v6LZtz86ebrMJjcO5kbfvTT MFuQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=KYRNTsVdaYlSHSfuYmA3P2EOKXN+Uq5zL8g/UB0TvXg=; b=bo07Qcv/jJoqEKGZ1dqVpS7QJW/Y5piKQiWNheN3nHOxiXCvOlmUyPsR8xW3PKMXtd /xsEtRV7cSYiDsNQAWTJl1qZQg8Csi1a3EnVLFKN2szaw48F9HSmPq3De8Sun0s8V1uL KRWiJob/xJ0TnK2kCoap7/1kaFG+gAR2e6tFjeNNJQYcK4QHz0QWzkWzB5abcEXs8Y5c 0FMIjdVH77eytcCE47Sv8RPNdPjpkbNBbxfSpeHjlfQy1508yXaYEcr/vwu34TwvvF1X TswuiAR+6o29irVt02zMSl0xCRnxBW8qny0OryFyisKo0jOKz5DDNHE5uwUGV8y/QS/h Nw0A== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=nKcjAwye; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=KYRNTsVdaYlSHSfuYmA3P2EOKXN+Uq5zL8g/UB0TvXg=; b=FwyvyFehsRoiMAywdjCqPfjSNCe1SB3j4FBjDEjdA/JJN7RkqRVYAmeI+aYBubHSIm +eEy70CB3M6hvHdlMm4NKPjV/aKZSEGZ/Wux/5IVCHCVEeRx/9uFQj1cEOiCvBih+4gO MEHnLTmtbGtLQ6GUh/PNw4HA4MjWH1sjlM/18= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=KYRNTsVdaYlSHSfuYmA3P2EOKXN+Uq5zL8g/UB0TvXg=; b=jTDoNLEmi7HdusC0ef55h6PBjsSaj1Boh2E2BqVOQOQ4l/WHURQyX53+D5EU+Ozx5g pszXihC7ZoTi8CLTMb4Zig9gLrBQWfIHAAKl307j0AwixNM0G4evoiv//F4KnmhXY6hQ Ut0CvZlV+X0gqweo4qzd39NFWDl5UE7buWRu1t5jBn3Be9sIsSPH7M7U5Ra5wv3ctvDB yZJKpdVZCLw/2jXbZs/yLEe7JDy2nbc3VQVD/fcKvlDbLCpyoUJ0vnxglC53b4Azlyxb /opPYax5OemDpLRala5hlrYscBekL8dWq7u7DdTk6yeUnIn8Rl4Kry0mzy+9hGoD39aE Q5xw== X-Gm-Message-State: AOAM531oOKoiANRBwcHKNh8912iCNK41HKsw3ZDd2VHar8USbLb7dx7a ITOXyhNjQFOgyn8ufSx2HmCaxKw6 X-Google-Smtp-Source: ABdhPJyGRZVBzrUXe16cEKrM3jM9qvy22SzW3A9s+bhS4BtN/JjfCq6kZDO2wJrCMvpHpZ2H7WE8xA== X-Received: by 2002:a17:906:314b:b0:6d6:da31:e545 with SMTP id e11-20020a170906314b00b006d6da31e545mr11538565eje.125.1652606748434; Sun, 15 May 2022 02:25:48 -0700 (PDT) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a05:6402:2741:b0:41f:7eee:e393 with SMTP id z1-20020a056402274100b0041f7eeee393ls3092660edd.3.gmail; Sun, 15 May 2022 02:25:47 -0700 (PDT) X-Received: by 2002:a05:6402:e83:b0:428:727e:7e2c with SMTP id h3-20020a0564020e8300b00428727e7e2cmr7641133eda.26.1652606747110; Sun, 15 May 2022 02:25:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1652606747; cv=none; d=google.com; s=arc-20160816; b=CbnkeBwsDedOW+52aETSYY8JGTH3Uo8oesjjP03qyW5j1fmtP7gbsSzMqM+XpiQwi0 qbji/TWFylstF6NNeSAmOKGt/bpo2JBjfrx7HB+rk6D4kRIZur5lnK4P3qJzU1/bfzwS tXqcb+3Qns27laXY4gA6QkaN9kW5f4HLM0d5cNwI3zXHSm+MO5O1Op4iLfkr+unMovCs G60gFW0g+DDg21an+oqn05ty2K9n3vZL8MMF1fLZ4knDb1rGilpVjrv6JGzM2xvFEu8h yQmIDqYUE5MqCP1KRMcWwC0jEm6Z+zm6TkvX0V6MHjicZFZxqNpG8gPPVpeo4GyrjqRX NabQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=O159ccGFk9andF48EnbXRwWOzhVcnIM+anpKSCa6pik=; b=L1yLmzHWAQPYEMJllZg1bwuktW81XgCgd2ArwVcq8N/CVnJ9GEWldxHv4ZC2/tSymH skOcBbebkXUR96RVe6l4gK8Ka28a4AUEC3+91iatifC2lyDsQ285OCEkDMohBR4FADAP 1u+fEIjtr6+c90GLaQPEr7mwNKm38D4iR3KHi9mvRJ9f4FrK1CvuaBlM3gvU763fdcEe 2K3gx0haatioCSYpuSXfxL3a7hla1SObeG6F+R5dr6xCX72dHtxVok7AJ6jGATlhoEs2 gVDUJGb/KhacLzMP2n9wgNanssIHNp1jajw6KFe/ddsR0Zz/SynX4sally0vkWBSVxHA NWJw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=nKcjAwye; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Received: from mail-sor-f41.google.com (mail-sor-f41.google.com. [209.85.220.41]) by mx.google.com with SMTPS id u7-20020a170906108700b006df7a679668sor2621850eju.59.2022.05.15.02.25.47 for (Google Transport Security); Sun, 15 May 2022 02:25:47 -0700 (PDT) Received-SPF: pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a17:907:9958:b0:6e7:f67a:a1e7 with SMTP id kl24-20020a170907995800b006e7f67aa1e7mr10756458ejc.400.1652606746791; Sun, 15 May 2022 02:25:46 -0700 (PDT) Received: from localhost.localdomain (mob-109-118-140-232.net.vodafone.it. [109.118.140.232]) by smtp.gmail.com with ESMTPSA id m17-20020a17090677d100b006f3ef214dc5sm2509888ejn.43.2022.05.15.02.25.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 15 May 2022 02:25:46 -0700 (PDT) From: Michael Trimarchi To: Han Xu , U-Boot-Denx Cc: Ye Li , Stefano Babic , Miquel Raynal , Fabio Estevam , Dario Binacchi , Sean Anderson , linux-amarula@amarulasolutions.com, Jagan Teki , Ariel D'Alessandro , Tom Rini , Fabio Estevam , Tim Harvey Subject: [PATCH V3 2/5] mtd: nand: mxs_nand_spl: Fix bad block skipping Date: Sun, 15 May 2022 11:25:35 +0200 Message-Id: <20220515092538.1736154-3-michael@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220515092538.1736154-1-michael@amarulasolutions.com> References: <20220515092538.1736154-1-michael@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: michael@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=nKcjAwye; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , The specific implementation was having bug. Those bugs are since the beginning of the implementation. Some manufactures can already experience this bug in their SPL code. This bug can be more visible on architecture that has complicated boot process like imx8mn. Older version of uboot can be affected if the bad block appear in correspoding of the beginning of u-boot image. In order to adjust the function we scan from the first erase block. The problematic part of old code was in this part: while (is_badblock(mtd, offs, 1)) { page = page + nand_page_per_block; /* Check i we've reached the end of flash. */ if (page >= mtd->size >> chip->page_shift) { free(page_buf); return -ENOMEM; } } Even we fix it adding increment of the offset of one erase block size , we don't fix the problem, because the first erase block where the image start is not checked. The code was tested on an imx8mn where the boot rom api was not able to skip it. This code is used by other architecures like imx6 and imx8mm Cc: Han Xu Cc: Fabio Estevam Acked-by: Han Xu Tested-By: Tim Harvey Signed-off-by: Michael Trimarchi --- V2->V3: - Add tested-by from Tim - Add ack from Han Xu - Rework english of commit message V1->V2: - Adjust the commit message - Add Cc Han Xu and Fabio - fix size >= 0 to > 0 --- drivers/mtd/nand/raw/mxs_nand_spl.c | 90 ++++++++++++++++------------- 1 file changed, 49 insertions(+), 41 deletions(-) diff --git a/drivers/mtd/nand/raw/mxs_nand_spl.c b/drivers/mtd/nand/raw/mxs_nand_spl.c index 59a67ee414..2bfb181007 100644 --- a/drivers/mtd/nand/raw/mxs_nand_spl.c +++ b/drivers/mtd/nand/raw/mxs_nand_spl.c @@ -218,14 +218,14 @@ void nand_init(void) mxs_nand_setup_ecc(mtd); } -int nand_spl_load_image(uint32_t offs, unsigned int size, void *buf) +int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst) { - struct nand_chip *chip; - unsigned int page; + unsigned int sz; + unsigned int block, lastblock; + unsigned int page, page_offset; unsigned int nand_page_per_block; - unsigned int sz = 0; + struct nand_chip *chip; u8 *page_buf = NULL; - u32 page_off; chip = mtd_to_nand(mtd); if (!chip->numchips) @@ -235,47 +235,42 @@ int nand_spl_load_image(uint32_t offs, unsigned int size, void *buf) if (!page_buf) return -ENOMEM; - page = offs >> chip->page_shift; - page_off = offs & (mtd->writesize - 1); + /* offs has to be aligned to a page address! */ + block = offs / mtd->erasesize; + lastblock = (offs + size - 1) / mtd->erasesize; + page = (offs % mtd->erasesize) / mtd->writesize; + page_offset = offs % mtd->writesize; nand_page_per_block = mtd->erasesize / mtd->writesize; - debug("%s offset:0x%08x len:%d page:%x\n", __func__, offs, size, page); - - while (size) { - if (mxs_read_page_ecc(mtd, page_buf, page) < 0) - return -1; - - if (size > (mtd->writesize - page_off)) - sz = (mtd->writesize - page_off); - else - sz = size; - - memcpy(buf, page_buf + page_off, sz); - - offs += mtd->writesize; - page++; - buf += (mtd->writesize - page_off); - page_off = 0; - size -= sz; - - /* - * Check if we have crossed a block boundary, and if so - * check for bad block. - */ - if (!(page % nand_page_per_block)) { - /* - * Yes, new block. See if this block is good. If not, - * loop until we find a good block. - */ - while (is_badblock(mtd, offs, 1)) { - page = page + nand_page_per_block; - /* Check i we've reached the end of flash. */ - if (page >= mtd->size >> chip->page_shift) { + while (block <= lastblock && size > 0) { + if (!is_badblock(mtd, mtd->erasesize * block, 1)) { + /* Skip bad blocks */ + while (page < nand_page_per_block) { + int curr_page = nand_page_per_block * block + page; + + if (mxs_read_page_ecc(mtd, page_buf, curr_page) < 0) { free(page_buf); - return -ENOMEM; + return -EIO; } + + if (size > (mtd->writesize - page_offset)) + sz = (mtd->writesize - page_offset); + else + sz = size; + + memcpy(dst, page_buf + page_offset, sz); + dst += sz; + size -= sz; + page_offset = 0; + page++; } + + page = 0; + } else { + lastblock++; } + + block++; } free(page_buf); @@ -294,6 +289,19 @@ void nand_deselect(void) u32 nand_spl_adjust_offset(u32 sector, u32 offs) { - /* Handle the offset adjust in nand_spl_load_image,*/ + unsigned int block, lastblock; + + block = sector / mtd->erasesize; + lastblock = (sector + offs) / mtd->erasesize; + + while (block <= lastblock) { + if (is_badblock(mtd, block * mtd->erasesize, 1)) { + offs += mtd->erasesize; + lastblock++; + } + + block++; + } + return offs; }