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[83.225.9.201]) by smtp.gmail.com with ESMTPSA id b12-20020a170906660c00b0070e3f58ed5csm3260761ejp.48.2022.06.05.09.57.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 05 Jun 2022 09:57:19 -0700 (PDT) From: Michael Trimarchi To: Rob Herring , Krzysztof Kozlowski , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , "Ariel D'Alessandro" , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE), linux-kernel@vger.kernel.org (open list) Cc: Dario Binacchi , linux-amarula@amarulasolutions.com, devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE), linux-kernel@vger.kernel.org (open list) Subject: [RFC PATCH 3/3] arm64: dts: imx8mn-bsh-smm-s2/pro: Add pmic clock connection Date: Sun, 5 Jun 2022 18:57:03 +0200 Message-Id: <20220605165703.1565234-4-michael@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220605165703.1565234-1-michael@amarulasolutions.com> References: <20220605165703.1565234-1-michael@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: michael@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=qgHPz3Td; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , pmic clock is connected to svns_rtc using RTC_XTALI pin so we need to mark this clock as critical. The clock source even the wifi/bluetooth chipset Signed-off-by: Michael Trimarchi --- arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi index c11895d9d582..072d2c480f20 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi @@ -28,6 +28,8 @@ usdhc2_pwrseq: usdhc2-pwrseq { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc2_pwrseq>; reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>; + clocks = <&bd71847 0>; + clock-names = "ext_clock"; }; }; @@ -92,6 +94,7 @@ bd71847: pmic@4b { rohm,reset-snvs-powered; #clock-cells = <0>; + clock-critical = <1>; clocks = <&osc_32k 0>; clock-output-names = "clk-32k-out"; @@ -235,6 +238,8 @@ bluetooth { shutdown-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>; device-wakeup-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>; host-wakeup-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>; + clocks = <&bd71847 0>; + clock-names = "lpo"; max-speed = <3000000>; }; };