From patchwork Thu Jul 14 14:35:40 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Trimarchi X-Patchwork-Id: 2174 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-wm1-f70.google.com (mail-wm1-f70.google.com [209.85.128.70]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 5962C3F066 for ; Thu, 14 Jul 2022 16:36:15 +0200 (CEST) Received: by mail-wm1-f70.google.com with SMTP id c187-20020a1c35c4000000b003a19b3b9e6csf2738653wma.5 for ; Thu, 14 Jul 2022 07:36:15 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1657809375; cv=pass; d=google.com; s=arc-20160816; b=c7OshuOWLMs3NUAZfkZCTY8p1x2NO7pp3UAktk8s6pb8TqDM7cAVUq3EPffma1ISu4 YLWG4FdzKglhF0pD4bYyQToMnePzxUT5hea8AQHEhW98Y41Wub3kM+D29Nek+GyuxZJE SDUJ6CQ/XCe1nV32q+elyb7SVsqGYAyUltmY1yHWeztmdsNY6qjr2T4OVR02N+9FqznY SN/oIaoTOskM6UHy5fSLCSA6Ikmr+aGppQt60i+b4IpiiI9czO4amPGfo0CSduPF0ZS8 lB+92bQzZ5ZUm8mzqwrdWqN2krVBdZKnJQyy8Iq9ykmJZ51grFVXSH4WrXWqgUUkfjqz haNQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=vmVx0z3Ubo58SrdMiS1PVaibssXAk6ZsNS2GtJ/YPc4=; b=sIkX7fAPdLtKU1781GEmrmPqm5CHH/eYyPbtPshRZsHkU6uKJQBcrHT3EbgRQ7XsAl l5uXDtKsLMdjDLuF8XhWX6G5Wld0FauoU/L0E+0kxLZD8jsNjRNk70EnSFabaWJYFUbg 9i9JqS8NeqOHjGhlH/4c4P53fOI/SPnpwIidgiS/X5t113EFEECSPm4MsQuaq/ovaj0h 7f4S2IMefaLSq+a3dRRVGuZCL6+jeomVedlyQGZor1D+bXHG/wPq0IiIM2Xy0QnNgxVD iYNQUJJ7Q3c/P/kO1pEuNKe5ei9u4h5HBPyVBmqWzVmJ0WCX6N1m2vVByquwPffouqmr oyUQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=NgV4IJmg; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=vmVx0z3Ubo58SrdMiS1PVaibssXAk6ZsNS2GtJ/YPc4=; b=LN1ziRLyQSEEsAJV0WLtgH0BN0atCUw1dvlqBhKmcKsZbvN2GSzGZQgUQeLdsPRIdo l2eIhniMT11FZf2J319rFCqm7PWX6VAhsY6/zpdhkvDv0mkLILhhhkb3NTmTw4VNE6eh MBc6k3ZViqIrr3LkMaToIpmB5BprKCM+TfLPs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=vmVx0z3Ubo58SrdMiS1PVaibssXAk6ZsNS2GtJ/YPc4=; b=caCnhJX8cZMHd/cyVqGZ+eQM+dDC1XLv1UNzs28fO4jgZy13Lq1uCTpSttzLT7CstF N+gJ+gCehfbBRw16SYLgGfWU2299GqL4esRyPK9APZ4C6s23bd+v648OHgq+iFA4aND3 k9fMWAtsGAcjteyVG/JOC69X71mA1xTNYru6c/wcF/nQobgkN88hpitZNIioPLgeZai1 pYEN/vDfXl5icINHK7KrD0qtlPgcs0coLMTzJM2w6hheTIcwk0UggXdHdUdMtk28NIcr CN7kgMedTQTW8zF+ENGeYTT5QHaJGLiQefGgRdnOVl7M8FZBeMKc4RQ3MOpCwWXp4neD AwMA== X-Gm-Message-State: AJIora9HLeA99xFXiNrfOceWzyFLW6HLxLrQ9ytlv3s4cvtwka8aJ9B4 v3S0Q671bOHRpgdTnte+uVkW62/f X-Google-Smtp-Source: AGRyM1smZzILNgQjTcoFKTlk+gCB8pEiMZOXI48zmMKcC3eFOMkgRrnPAYCOdaBttVGjs/TSyF/BIA== X-Received: by 2002:adf:f88c:0:b0:21d:bac6:949f with SMTP id u12-20020adff88c000000b0021dbac6949fmr8701244wrp.551.1657809375180; Thu, 14 Jul 2022 07:36:15 -0700 (PDT) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a05:6000:1ac7:b0:21d:ab25:25ba with SMTP id i7-20020a0560001ac700b0021dab2525bals244194wry.2.gmail; Thu, 14 Jul 2022 07:36:14 -0700 (PDT) X-Received: by 2002:adf:e5c4:0:b0:21d:8b5f:ccef with SMTP id a4-20020adfe5c4000000b0021d8b5fccefmr8048984wrn.125.1657809373993; Thu, 14 Jul 2022 07:36:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1657809373; cv=none; d=google.com; s=arc-20160816; b=qyGpCJFxpH0KRQPUvWae4bBrK7Bkr4QPZOS3W20uTz/QOw8WtfMlczoShvM3CyDGgu wlUp4kyVizN1xrYDA+v3FGpAkNiCddzap23+2yi+67NbnymAMhgkRh6N0ujq1FNTO+G8 I8sb86no8oOgqnE4PbIIk3Ztd+oEev0u8M7Yn5ZtUH3KMK4iSzO3B085CbX6Mu4m5HLM pAOsbvC+20zYjg821J/uNUAiHN8+YRZgZy2944ukPNXnFFVQsN9zSMHwKzfKEf8WkgIG eippDVVksL6/W7Il4X0fhsrKyChofXzg5UTc7VWzu/ktpYPIwQemTE6u5DkWceO8RW0Z UtQA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=bUAelgxhRmK6KYlzb4SR7SBVjPUr+bul0VwHLDW2c3U=; b=IOEmQKwxxRdSYB34a5Es1/yDX7AX0giZAGJDg4ReLsFlhig9rsdAOBchCiLqSKGzJk AxJs2StIH6B+yFxGIqR2UU1v/7t92W+19iSZHfTaU5CeyTet94SLJMOtdfW/CrPfdJPA 8pTx434bGl6WZ/+FGp6tC+O7cEdZGKfuhiY907wep46OqodmsDQAbVM3UmYyhO4ZOCBf jU2a+g3RpMf0uSqtMqGv8KNjjE1+HziiPQVMZ7mIGrAIlxwjVBydr8VhcaRKAItR8nyJ Aw/kZLk2OYwu1Vdy9IWmBZ8PrxHrmGHbSK4zoIFXjHh0XbmDxmmmuda9rtxG3WcP0yhw Yj7g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=NgV4IJmg; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Received: from mail-sor-f41.google.com (mail-sor-f41.google.com. [209.85.220.41]) by mx.google.com with SMTPS id az12-20020a05600c600c00b003a2f1edf4f0sor2630514wmb.0.2022.07.14.07.36.13 for (Google Transport Security); Thu, 14 Jul 2022 07:36:13 -0700 (PDT) Received-SPF: pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a05:600c:4ed0:b0:3a0:5263:cf09 with SMTP id g16-20020a05600c4ed000b003a05263cf09mr9735187wmq.6.1657809373289; Thu, 14 Jul 2022 07:36:13 -0700 (PDT) Received: from panicking.. ([2.198.242.86]) by smtp.gmail.com with ESMTPSA id u18-20020a05600c19d200b003973c54bd69sm5712357wmq.1.2022.07.14.07.36.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Jul 2022 07:36:12 -0700 (PDT) From: Michael Trimarchi To: linux-amarula@amarulasolutions.com, Dario Binacchi , Tommaso Merciai , Boris Brezillon , Richard Weinberger , Patrice Chotard , Simon Glass , Wolfgang Denk , u-boot@lists.denx.de (open list) Cc: Boris Brezillon , Marek Vasut , u-boot@lists.denx.de (open list) Subject: [PATCH 08/11] mtd: nand: Move Toshiba specific init/detection logic in nand_toshiba.c Date: Thu, 14 Jul 2022 16:35:40 +0200 Message-Id: <20220714143543.448991-9-michael@amarulasolutions.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220714143543.448991-1-michael@amarulasolutions.com> References: <20220714143543.448991-1-michael@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: michael@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=NgV4IJmg; spf=pass (google.com: domain of michael@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=michael@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Upstream commit 9b2d61f80b060ce3ea5af2a99e148b0b214932b2 Move Toshiba specific initialization and detection logic into nand_toshiba.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Boris Brezillon Acked-by: Richard Weinberger Signed-off-by: Michael Trimarchi --- drivers/mtd/nand/raw/Makefile | 3 +- drivers/mtd/nand/raw/nand_base.c | 21 ++---------- drivers/mtd/nand/raw/nand_ids.c | 2 +- drivers/mtd/nand/raw/nand_toshiba.c | 53 +++++++++++++++++++++++++++++ include/linux/mtd/rawnand.h | 1 + 5 files changed, 59 insertions(+), 21 deletions(-) create mode 100644 drivers/mtd/nand/raw/nand_toshiba.c diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile index 294d131264..db608a2830 100644 --- a/drivers/mtd/nand/raw/Makefile +++ b/drivers/mtd/nand/raw/Makefile @@ -14,7 +14,7 @@ obj-$(CONFIG_SPL_NAND_DENALI) += denali_spl.o obj-$(CONFIG_SPL_NAND_SIMPLE) += nand_spl_simple.o obj-$(CONFIG_SPL_NAND_LOAD) += nand_spl_load.o obj-$(CONFIG_SPL_NAND_ECC) += nand_ecc.o -obj-$(CONFIG_SPL_NAND_BASE) += nand_base.o nand_hynix.o nand_samsung.o +obj-$(CONFIG_SPL_NAND_BASE) += nand_base.o nand_hynix.o nand_samsung.o nand_toshiba.o obj-$(CONFIG_SPL_NAND_IDENT) += nand_ids.o nand_timings.o obj-$(CONFIG_TPL_NAND_INIT) += nand.o ifeq ($(CONFIG_SPL_ENV_SUPPORT),y) @@ -33,6 +33,7 @@ obj-y += nand_ecc.o obj-y += nand_base.o obj-y += nand_hynix.o obj-y += nand_samsung.o +obj-y += nand_toshiba.o obj-y += nand_timings.o endif # not spl diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index 6ff1a2cb29..8c06b1c530 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -4163,12 +4163,11 @@ static int nand_get_bits_per_cell(u8 cellinfo) void nand_decode_ext_id(struct nand_chip *chip) { struct mtd_info *mtd = &chip->mtd; - int extid, id_len; + int extid; /* The 3rd id byte holds MLC / multichip data */ chip->bits_per_cell = nand_get_bits_per_cell(chip->id.data[2]); /* The 4th id byte is the important one */ extid = chip->id.data[3]; - id_len = chip->id.len; /* Calc pagesize */ mtd->writesize = 1024 << (extid & 0x03); @@ -4184,21 +4183,6 @@ void nand_decode_ext_id(struct nand_chip *chip) /* Get buswidth information */ if (extid & 0x1) chip->options |= NAND_BUSWIDTH_16; - - /* - * Toshiba 24nm raw SLC (i.e., not BENAND) have 32B OOB per - * 512B page. For Toshiba SLC, we decode the 5th/6th byte as - * follows: - * - ID byte 6, bits[2:0]: 100b -> 43nm, 101b -> 32nm, - * 110b -> 24nm - * - ID byte 5, bit[7]: 1 -> BENAND, 0 -> raw SLC - */ - if (id_len >= 6 && chip->id.data[0] == NAND_MFR_TOSHIBA && - nand_is_slc(chip) && - (chip->id.data[5] & 0x7) == 0x6 /* 24nm */ && - !(chip->id.data[4] & 0x80) /* !BENAND */) { - mtd->oobsize = 32 * mtd->writesize >> 9; - } } EXPORT_SYMBOL_GPL(nand_decode_ext_id); @@ -4290,8 +4274,7 @@ static void nand_decode_bbm_options(struct mtd_info *mtd, * AMD/Spansion, and Macronix. All others scan only the first page. */ if ((nand_is_slc(chip) && - (maf_id == NAND_MFR_TOSHIBA || - maf_id == NAND_MFR_AMD || + (maf_id == NAND_MFR_AMD || maf_id == NAND_MFR_MACRONIX)) || (mtd->writesize == 2048 && maf_id == NAND_MFR_MICRON)) chip->bbt_options |= NAND_BBT_SCAN2NDPAGE; diff --git a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c index ec263a4327..509652c8e2 100644 --- a/drivers/mtd/nand/raw/nand_ids.c +++ b/drivers/mtd/nand/raw/nand_ids.c @@ -188,7 +188,7 @@ struct nand_flash_dev nand_flash_ids[] = { /* Manufacturer IDs */ struct nand_manufacturers nand_manuf_ids[] = { - {NAND_MFR_TOSHIBA, "Toshiba"}, + {NAND_MFR_TOSHIBA, "Toshiba", &toshiba_nand_manuf_ops}, {NAND_MFR_SAMSUNG, "Samsung", &samsung_nand_manuf_ops}, {NAND_MFR_FUJITSU, "Fujitsu"}, {NAND_MFR_NATIONAL, "National"}, diff --git a/drivers/mtd/nand/raw/nand_toshiba.c b/drivers/mtd/nand/raw/nand_toshiba.c new file mode 100644 index 0000000000..1ac80df651 --- /dev/null +++ b/drivers/mtd/nand/raw/nand_toshiba.c @@ -0,0 +1,53 @@ +/* + * Copyright (C) 2017 Free Electrons + * Copyright (C) 2017 NextThing Co + * + * Author: Boris Brezillon + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include + +static void toshiba_nand_decode_id(struct nand_chip *chip) +{ + struct mtd_info *mtd = nand_to_mtd(chip); + + nand_decode_ext_id(chip); + + /* + * Toshiba 24nm raw SLC (i.e., not BENAND) have 32B OOB per + * 512B page. For Toshiba SLC, we decode the 5th/6th byte as + * follows: + * - ID byte 6, bits[2:0]: 100b -> 43nm, 101b -> 32nm, + * 110b -> 24nm + * - ID byte 5, bit[7]: 1 -> BENAND, 0 -> raw SLC + */ + if (chip->id.len >= 6 && nand_is_slc(chip) && + (chip->id.data[5] & 0x7) == 0x6 /* 24nm */ && + !(chip->id.data[4] & 0x80) /* !BENAND */) + mtd->oobsize = 32 * mtd->writesize >> 9; +} + +static int toshiba_nand_init(struct nand_chip *chip) +{ + if (nand_is_slc(chip)) + chip->bbt_options |= NAND_BBT_SCAN2NDPAGE; + + return 0; +} + +const struct nand_manufacturer_ops toshiba_nand_manuf_ops = { + .detect = toshiba_nand_decode_id, + .init = toshiba_nand_init, +}; diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index d35277d187..73abb34016 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -1158,6 +1158,7 @@ struct nand_manufacturers { extern struct nand_flash_dev nand_flash_ids[]; extern struct nand_manufacturers nand_manuf_ids[]; +extern const struct nand_manufacturer_ops toshiba_nand_manuf_ops; extern const struct nand_manufacturer_ops samsung_nand_manuf_ops; extern const struct nand_manufacturer_ops hynix_nand_manuf_ops;