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[209.85.220.41]) by mx.google.com with SMTPS id 191-20020a6216c8000000b00525205dab39sor9623998pfw.96.2022.07.20.08.53.06 for (Google Transport Security); Wed, 20 Jul 2022 08:53:06 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a63:904a:0:b0:415:18b4:ea92 with SMTP id a71-20020a63904a000000b0041518b4ea92mr34007714pge.551.1658332385950; Wed, 20 Jul 2022 08:53:05 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c00a:a073:d177:d5:aee:4f03]) by smtp.gmail.com with ESMTPSA id a8-20020a170902710800b0015e8d4eb1d7sm13919198pll.33.2022.07.20.08.52.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Jul 2022 08:53:05 -0700 (PDT) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Fancy Fang , Tim Harvey , Michael Nazzareno Trimarchi , Adam Ford , Neil Armstrong , Robert Foss , Laurent Pinchart , Tommaso Merciai , Marek Vasut Cc: Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula , Jagan Teki Subject: [PATCH v3 05/13] drm: bridge: samsung-dsim: Mark PHY as optional Date: Wed, 20 Jul 2022 21:22:02 +0530 Message-Id: <20220720155210.365977-6-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220720155210.365977-1-jagan@amarulasolutions.com> References: <20220720155210.365977-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=lPurvLEt; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , In i.MX8M Mini/Nano SoC the DSI Phy requires a MIPI DPHY bit to reset in order to activate the PHY and that can be done via upstream i.MX8M blk-ctrl driver. So, mark the phy get as optional. v3, v2: * none v1: * new patch Signed-off-by: Jagan Teki --- drivers/gpu/drm/bridge/samsung-dsim.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c index 4d5f72de2240..9b74a3f98a17 100644 --- a/drivers/gpu/drm/bridge/samsung-dsim.c +++ b/drivers/gpu/drm/bridge/samsung-dsim.c @@ -1583,7 +1583,7 @@ static int samsung_dsim_probe(struct platform_device *pdev) if (IS_ERR(dsi->reg_base)) return PTR_ERR(dsi->reg_base); - dsi->phy = devm_phy_get(dev, "dsim"); + dsi->phy = devm_phy_optional_get(dev, "dsim"); if (IS_ERR(dsi->phy)) { dev_info(dev, "failed to get dsim phy\n"); return PTR_ERR(dsi->phy);