From patchwork Thu Jul 21 06:44:29 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 2222 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-wr1-f72.google.com (mail-wr1-f72.google.com [209.85.221.72]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id ABFC644190 for ; Thu, 21 Jul 2022 08:45:00 +0200 (CEST) Received: by mail-wr1-f72.google.com with SMTP id k26-20020adfb35a000000b0021d6c3b9363sf71261wrd.1 for ; Wed, 20 Jul 2022 23:45:00 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1658385900; cv=pass; d=google.com; s=arc-20160816; b=NcZnXCwUwnIcWIniqimfNRJM5HCkdbkWLXVIMHLC/TOOQkj7OrvmHpyr33XCd4UeEs GZmTNlWLui6QHG8WwdY1y4G8fQbDo4ZGPoUv1makw6VXzTUNrIcQO1WdbW/EFWtyBEox 71Ro7qL0ki+My2bp2wW2TZSGqNgT3dtqiODMJznrM7hRZdsiV3phHdqLum7nJBTmfPCv UMYZsluaxJTgFn8SLS0M72mmYo0RM5TRRLUxhAAQUY3uxBpsw0d5IIuAgOUCb9n+kWvs +sHcVRMNZEDB/Ju3wdwwNhr1JCtR253G5yUeYNpxwz9kliVzsc+367brNTyTZv/LUkiV auvA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=czcbD/yQLceeBuw4OrKgqIT52ezQgIvSxL/gW46tqQ4=; b=kcQTYRl8fXTBARY33odombG9hUmQAVVAc7/hD9UY9txhRiMsF6/aXlro7hRne0Phx8 SRMm2zBjaBLXEpQ1gi2MQl9MNOxZ/slyMLCLIVS7iBIR9lJieGOFdo4pyw30bV5YqDtM qgXAWPV+FBCQir5a4GjMFXwv/CSUCgSmkrYR0IB53wmCpCTyQH+/gVHm4XHFF/FA8BRb Btl0gBHNBwjssRu4VwsJKcEPV6/UHXY5JenLTDBvKmSxrftolS9XPF2zZG2/5DnwwDIZ cdalBowv+Obapi79CNFa0UYFeR37BTH7umaJgugwp1gXQOSpnmJbeC9AIqGhBn7YTsZK w3dQ== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=PmSrI6hK; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:x-original-sender:x-original-authentication-results :precedence:mailing-list:list-id:list-post:list-help:list-archive :list-unsubscribe; bh=czcbD/yQLceeBuw4OrKgqIT52ezQgIvSxL/gW46tqQ4=; b=eimfNli3+nSQPv2qDKkaSJL1QQr3HjERlpmJAkprKQG9Hhp0CEoAMbrd3w3oFpx8/0 3DWWYR5HUTaCwIuFKVV6FcA35C7u0ddL58AN5e42yAWCElaKfVT5KPLb9kUNwmfOZqiK zb8tCTwxRmlBPa1TLSVBMxe/+fAS1LPQiRAGs= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:x-original-sender :x-original-authentication-results:precedence:mailing-list:list-id :x-spam-checked-in-group:list-post:list-help:list-archive :list-unsubscribe; bh=czcbD/yQLceeBuw4OrKgqIT52ezQgIvSxL/gW46tqQ4=; b=bvtyi5Zkw/Rd4qz1WSAfyFfoDvE8RBQOwl6d+H2ClCOB6JQYH+Pn/ughm9ag7pmQC6 QlaPokNLafpcg6p4IIL2oYENU+QXa4Ixqla/JozI2IpkmEJZfwGXlQVnt7HqRG+h2E7S YFHYdkgXttoK0S40IqyWOQBMIEc8Ovi6Ez1hzLrByPaSTNNCARqwF7+8A7Dk2nw+4aS9 UNBrpknjq1iCmEABvCVh+nFlk0cq0l3/pJIgroXad8wriZeMUG55/DJikpPktp/RvcoN p7f993ml0i8XUiRcoD0i8BfSWECNpzmqUBM4shH2dZxXT+QIAtd3cvz7pqu+l6oZxOZP Jtnw== X-Gm-Message-State: AJIora+G5FtJvYUVEpRKwinzZBrOVczkzPfxRu2yOG4gaz45j0xirQ/4 ivr7vCf6cDHZUJ58pxkAY6mwNC8L X-Google-Smtp-Source: AGRyM1t3Sg/SeQQsTdM+12Fc8+e5fBqqbA+WY6ELZyz6vXEV4YsV7VfL+O+oN3qctkrZeUfnD2Gisg== X-Received: by 2002:a05:600c:a188:b0:3a3:1802:e327 with SMTP id id8-20020a05600ca18800b003a31802e327mr6916787wmb.41.1658385900434; Wed, 20 Jul 2022 23:45:00 -0700 (PDT) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:adf:d209:0:b0:21e:53a1:af5d with SMTP id j9-20020adfd209000000b0021e53a1af5dls243871wrh.3.-pod-prod-gmail; Wed, 20 Jul 2022 23:44:59 -0700 (PDT) X-Received: by 2002:adf:f0cf:0:b0:21e:4915:2224 with SMTP id x15-20020adff0cf000000b0021e49152224mr5047772wro.418.1658385899473; Wed, 20 Jul 2022 23:44:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1658385899; cv=none; d=google.com; s=arc-20160816; b=YoukStFcyL7g/5wKx89TP/FyuaOlVatCSdpfHRz1Rq1wOKHF6Zbsum5XEM6A4jF4ad iA47+9CO8bwaeMwfpvLK8o3y++zB2m7undOuFtEXLTAj/u6pXUuTvpx8+0Bjn+1gx1qp wzdP59dgWkJqj8L3ZfidTgTq9MPpLHtmUXWPZ2fjhK/aBeaKMW51ZhD3UcCWzNH0Hr4a A/2lwvfIqghga0b/lbJFVa4RFm36wN72L1VX3P9kHlPi8RU008WLfIxT1s4bH7hXUwcp ndpfNRetnb84PZg1F8wz0bFhr23hO13YnvlmRJwhYjRBn+Xzml4ulePKOQoH3l8YKKOw Oblw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=8OpcHreBUVChk8kHrZJ/Qqi1ZoIveTy4LkKfvCBsChw=; b=i5iX2Ry2X7S06woIdfgFdCv6NXpBLbYK/qZYOxn5ayLSzQTg5G24bESx/z0SDCydxi 9HDcFCIbwGtlThevpvWSA1HPhmKi6ncL8Cqqy5ZPyEFh3f0yXf9DKFrwpM/vKoQYyjRH Zukyun0jnkAxGNP34nPfHh20v9QPO4XuNcxn65uCdI1kMjs70MRJ0/mkNfDSByWfoINJ ywacMF5jSn0+IhiFgbt5sYLYlkNYtlkDzgYSiH6utH8OwrKw62f5Q8yDqG/GzSV+C6Bx J+PqDTuBdwYTQJdxl6kN+oNvhCi9FlDcNplyo37oC/mKyh48kMel+bMfpb4wDcjMOxSi CnkA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=PmSrI6hK; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Received: from mail-sor-f41.google.com (mail-sor-f41.google.com. [209.85.220.41]) by mx.google.com with SMTPS id o13-20020adfba0d000000b0021d8011fa5esor406299wrg.57.2022.07.20.23.44.59 for (Google Transport Security); Wed, 20 Jul 2022 23:44:59 -0700 (PDT) Received-SPF: pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a05:6000:49:b0:21d:78fe:34b2 with SMTP id k9-20020a056000004900b0021d78fe34b2mr32411473wrx.200.1658385899106; Wed, 20 Jul 2022 23:44:59 -0700 (PDT) Received: from dario-ThinkPad-T14s-Gen-2i.pdxnet.pdxeng.ch (mob-5-90-140-42.net.vodafone.it. [5.90.140.42]) by smtp.gmail.com with ESMTPSA id c18-20020a056000105200b0021e4f446d43sm903711wrx.58.2022.07.20.23.44.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Jul 2022 23:44:58 -0700 (PDT) From: Dario Binacchi To: u-boot@lists.denx.de Cc: Amarula patchwork , michael@amarulasolutions.com, Dario Binacchi , Patrice Chotard , Simon Glass , Wolfgang Denk Subject: [PATCH v3 07/13] mtd: nand: Move Hynix specific init/detection logic in nand_hynix.c Date: Thu, 21 Jul 2022 08:44:29 +0200 Message-Id: <20220721064435.2456601-8-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220721064435.2456601-1-dario.binacchi@amarulasolutions.com> References: <20220721064435.2456601-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=PmSrI6hK; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Michael Trimarchi Upstream linux commit 01389b6bd2f4f7. Move Hynix specific initialization and detection logic into nand_hynix.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi --- Changes in v3: - Use commit sha1 with 13 digits. - Add the SPDX-License-Identifier tag. - Fix code style warnings raised by patman. Changes in v2: - Use short-commit form - Remove linux info. Uboot seems that backport without add this extra information. - Adjust the include file in nand_hynix. drivers/mtd/nand/raw/Makefile | 3 +- drivers/mtd/nand/raw/nand_base.c | 117 ++++++++---------------------- drivers/mtd/nand/raw/nand_hynix.c | 85 ++++++++++++++++++++++ drivers/mtd/nand/raw/nand_ids.c | 2 +- include/linux/mtd/rawnand.h | 1 + 5 files changed, 120 insertions(+), 88 deletions(-) create mode 100644 drivers/mtd/nand/raw/nand_hynix.c diff --git a/drivers/mtd/nand/raw/Makefile b/drivers/mtd/nand/raw/Makefile index 440290bed0fe..86d9b8e8beb8 100644 --- a/drivers/mtd/nand/raw/Makefile +++ b/drivers/mtd/nand/raw/Makefile @@ -14,7 +14,7 @@ obj-$(CONFIG_SPL_NAND_DENALI) += denali_spl.o obj-$(CONFIG_SPL_NAND_SIMPLE) += nand_spl_simple.o obj-$(CONFIG_SPL_NAND_LOAD) += nand_spl_load.o obj-$(CONFIG_SPL_NAND_ECC) += nand_ecc.o -obj-$(CONFIG_SPL_NAND_BASE) += nand_base.o nand_samsung.o +obj-$(CONFIG_SPL_NAND_BASE) += nand_base.o nand_hynix.o nand_samsung.o obj-$(CONFIG_SPL_NAND_IDENT) += nand_ids.o nand_timings.o obj-$(CONFIG_TPL_NAND_INIT) += nand.o ifeq ($(CONFIG_SPL_ENV_SUPPORT),y) @@ -31,6 +31,7 @@ obj-y += nand_ids.o obj-y += nand_util.o obj-y += nand_ecc.o obj-y += nand_base.o +obj-y += nand_hynix.o obj-y += nand_samsung.o obj-y += nand_timings.o diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index fe59157bc3c4..5698c1e6a229 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -4170,85 +4170,34 @@ void nand_decode_ext_id(struct nand_chip *chip) extid = chip->id.data[3]; id_len = chip->id.len; + /* Calc pagesize */ + mtd->writesize = 1024 << (extid & 0x03); + extid >>= 2; + /* Calc oobsize */ + mtd->oobsize = (8 << (extid & 0x01)) * + (mtd->writesize >> 9); + extid >>= 2; + /* Calc blocksize. Blocksize is multiples of 64KiB */ + mtd->erasesize = (64 * 1024) << (extid & 0x03); + extid >>= 2; + /* Get buswidth information */ + /* Get buswidth information */ + if (extid & 0x1) + chip->options |= NAND_BUSWIDTH_16; + /* - * Field definitions are in the following datasheets: - * Old style (4,5 byte ID): Samsung K9GAG08U0M (p.32) - * Hynix MLC (6 byte ID): Hynix H27UBG8T2B (p.22) - * - * Check for ID length, non-zero 6th byte, cell type, and Hynix/Samsung - * ID to decide what to do. + * Toshiba 24nm raw SLC (i.e., not BENAND) have 32B OOB per + * 512B page. For Toshiba SLC, we decode the 5th/6th byte as + * follows: + * - ID byte 6, bits[2:0]: 100b -> 43nm, 101b -> 32nm, + * 110b -> 24nm + * - ID byte 5, bit[7]: 1 -> BENAND, 0 -> raw SLC */ - if (id_len == 6 && chip->id.data[0] == NAND_MFR_HYNIX && - !nand_is_slc(chip)) { - unsigned int tmp; - - /* Calc pagesize */ - mtd->writesize = 2048 << (extid & 0x03); - extid >>= 2; - /* Calc oobsize */ - switch (((extid >> 2) & 0x04) | (extid & 0x03)) { - case 0: - mtd->oobsize = 128; - break; - case 1: - mtd->oobsize = 224; - break; - case 2: - mtd->oobsize = 448; - break; - case 3: - mtd->oobsize = 64; - break; - case 4: - mtd->oobsize = 32; - break; - case 5: - mtd->oobsize = 16; - break; - default: - mtd->oobsize = 640; - break; - } - extid >>= 2; - /* Calc blocksize */ - tmp = ((extid >> 1) & 0x04) | (extid & 0x03); - if (tmp < 0x03) - mtd->erasesize = (128 * 1024) << tmp; - else if (tmp == 0x03) - mtd->erasesize = 768 * 1024; - else - mtd->erasesize = (64 * 1024) << tmp; - } else { - /* Calc pagesize */ - mtd->writesize = 1024 << (extid & 0x03); - extid >>= 2; - /* Calc oobsize */ - mtd->oobsize = (8 << (extid & 0x01)) * - (mtd->writesize >> 9); - extid >>= 2; - /* Calc blocksize. Blocksize is multiples of 64KiB */ - mtd->erasesize = (64 * 1024) << (extid & 0x03); - extid >>= 2; - /* Get buswidth information */ - /* Get buswidth information */ - if (extid & 0x1) - chip->options |= NAND_BUSWIDTH_16; - - /* - * Toshiba 24nm raw SLC (i.e., not BENAND) have 32B OOB per - * 512B page. For Toshiba SLC, we decode the 5th/6th byte as - * follows: - * - ID byte 6, bits[2:0]: 100b -> 43nm, 101b -> 32nm, - * 110b -> 24nm - * - ID byte 5, bit[7]: 1 -> BENAND, 0 -> raw SLC - */ - if (id_len >= 6 && chip->id.data[0] == NAND_MFR_TOSHIBA && - nand_is_slc(chip) && - (chip->id.data[5] & 0x7) == 0x6 /* 24nm */ && - !(chip->id.data[4] & 0x80) /* !BENAND */) { - mtd->oobsize = 32 * mtd->writesize >> 9; - } - + if (id_len >= 6 && chip->id.data[0] == NAND_MFR_TOSHIBA && + nand_is_slc(chip) && + (chip->id.data[5] & 0x7) == 0x6 /* 24nm */ && + !(chip->id.data[4] & 0x80) /* !BENAND */) { + mtd->oobsize = 32 * mtd->writesize >> 9; } } EXPORT_SYMBOL_GPL(nand_decode_ext_id); @@ -4339,15 +4288,11 @@ static void nand_decode_bbm_options(struct mtd_info *mtd, * Micron devices with 2KiB pages and on SLC Samsung, Hynix, Toshiba, * AMD/Spansion, and Macronix. All others scan only the first page. */ - if (!nand_is_slc(chip) && maf_id == NAND_MFR_HYNIX) - chip->bbt_options |= NAND_BBT_SCANLASTPAGE; - else if ((nand_is_slc(chip) && - (maf_id == NAND_MFR_HYNIX || - maf_id == NAND_MFR_TOSHIBA || - maf_id == NAND_MFR_AMD || - maf_id == NAND_MFR_MACRONIX)) || - (mtd->writesize == 2048 && - maf_id == NAND_MFR_MICRON)) + if ((nand_is_slc(chip) && + (maf_id == NAND_MFR_TOSHIBA || + maf_id == NAND_MFR_AMD || + maf_id == NAND_MFR_MACRONIX)) || + (mtd->writesize == 2048 && maf_id == NAND_MFR_MICRON)) chip->bbt_options |= NAND_BBT_SCAN2NDPAGE; } diff --git a/drivers/mtd/nand/raw/nand_hynix.c b/drivers/mtd/nand/raw/nand_hynix.c new file mode 100644 index 000000000000..547ce7c92031 --- /dev/null +++ b/drivers/mtd/nand/raw/nand_hynix.c @@ -0,0 +1,85 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2017 Free Electrons + * Copyright (C) 2017 NextThing Co + * + * Author: Boris Brezillon + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include + +static void hynix_nand_decode_id(struct nand_chip *chip) +{ + struct mtd_info *mtd = nand_to_mtd(chip); + + /* Hynix MLC (6 byte ID): Hynix H27UBG8T2B (p.22) */ + if (chip->id.len == 6 && !nand_is_slc(chip)) { + u8 tmp, extid = chip->id.data[3]; + + /* Extract pagesize */ + mtd->writesize = 2048 << (extid & 0x03); + extid >>= 2; + + /* Extract oobsize */ + switch (((extid >> 2) & 0x4) | (extid & 0x3)) { + case 0: + mtd->oobsize = 128; + break; + case 1: + mtd->oobsize = 224; + break; + case 2: + mtd->oobsize = 448; + break; + case 3: + mtd->oobsize = 64; + break; + case 4: + mtd->oobsize = 32; + break; + case 5: + mtd->oobsize = 16; + break; + default: + mtd->oobsize = 640; + break; + } + + /* Extract blocksize */ + extid >>= 2; + tmp = ((extid >> 1) & 0x04) | (extid & 0x03); + if (tmp < 0x03) + mtd->erasesize = (128 * 1024) << tmp; + else if (tmp == 0x03) + mtd->erasesize = 768 * 1024; + else + mtd->erasesize = (64 * 1024) << tmp; + } else { + nand_decode_ext_id(chip); + } +} + +static int hynix_nand_init(struct nand_chip *chip) +{ + if (!nand_is_slc(chip)) + chip->bbt_options |= NAND_BBT_SCANLASTPAGE; + else + chip->bbt_options |= NAND_BBT_SCAN2NDPAGE; + + return 0; +} + +const struct nand_manufacturer_ops hynix_nand_manuf_ops = { + .detect = hynix_nand_decode_id, + .init = hynix_nand_init, +}; diff --git a/drivers/mtd/nand/raw/nand_ids.c b/drivers/mtd/nand/raw/nand_ids.c index f4126c3a5a13..ec263a43279a 100644 --- a/drivers/mtd/nand/raw/nand_ids.c +++ b/drivers/mtd/nand/raw/nand_ids.c @@ -194,7 +194,7 @@ struct nand_manufacturers nand_manuf_ids[] = { {NAND_MFR_NATIONAL, "National"}, {NAND_MFR_RENESAS, "Renesas"}, {NAND_MFR_STMICRO, "ST Micro"}, - {NAND_MFR_HYNIX, "Hynix"}, + {NAND_MFR_HYNIX, "Hynix", &hynix_nand_manuf_ops}, {NAND_MFR_MICRON, "Micron"}, {NAND_MFR_AMD, "AMD/Spansion"}, {NAND_MFR_MACRONIX, "Macronix"}, diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index d0312e924b4d..d35277d18799 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -1159,6 +1159,7 @@ extern struct nand_flash_dev nand_flash_ids[]; extern struct nand_manufacturers nand_manuf_ids[]; extern const struct nand_manufacturer_ops samsung_nand_manuf_ops; +extern const struct nand_manufacturer_ops hynix_nand_manuf_ops; int nand_default_bbt(struct mtd_info *mtd); int nand_markbad_bbt(struct mtd_info *mtd, loff_t offs);