From patchwork Wed Sep 28 08:45:04 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dario Binacchi X-Patchwork-Id: 2395 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-ed1-f70.google.com (mail-ed1-f70.google.com [209.85.208.70]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 252DD3F042 for ; Wed, 28 Sep 2022 10:45:27 +0200 (CEST) Received: by mail-ed1-f70.google.com with SMTP id w20-20020a05640234d400b00450f24c8ca6sf9692108edc.13 for ; Wed, 28 Sep 2022 01:45:27 -0700 (PDT) ARC-Seal: i=2; a=rsa-sha256; t=1664354727; cv=pass; d=google.com; s=arc-20160816; b=TCNmbxSpxAjSEe5As4jMWZ8EALXWuhlg3J8AvX+L3vnph3GwdNEyELNruoJJoBseZS zG0yiuqfw5dcZv19nNVhJzW/Ow0bfu0dSbnXA5zEwivo0rVn/FdgvNjxGC+U/G+fopZQ DyzteHGZvdkV33q/vuTPr8mHrlcMGfh/Xia0X6AP+foNIGDv+kYd0rfSpa2STZLzzMqU tdDf2sgbgrzHjM58lEAW/dqk92t3iM2OINLnfaxDp2aTyKjF1Umf4D/mG0uVigGQ8wTA VFa72gVk/OWXUinMRGB53nlb9uW3sOiSw3zsQx0702212Mpe7qjJzcg4g2TfdrRtoa5R KdUQ== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=pAStVDcRDBFA5J6CDaBVIQvWCiwWTHU9YEpphDjiv70=; b=0wbOPhD2U7kJR0BSjbNpWQmv/gSJ/sS7NJVpBTOzt0cdZ2DvoQ41lEKmHLCYqJ6yO+ GqOwOSpDAkhM6avqx+vd2AsSrNqoAAQj+viBa0HzuHtitjnZHucDtLTQ3XluFT5J4FF4 Z0Z3IQEf2kgBq7lAo6pYZf34jXZTyNblTJOugVLP1kcTmfBNOsiI6GUmFUIcGkRh2BoR jFzF+pRh7stn0v023NtUrDANRTHQ3ONEsNymgMpZT+el35TvMlm++vhRNjL/QUGHvHGW sHuKL7hpi/iztNPeQWAK5gwKKO0N2GQpztU0gzMvADiQblt/EYdWko2Rn4LO22/8EIG3 dVVg== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=MiQzFdlA; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:x-original-authentication-results :x-original-sender:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:from:to:cc:subject:date; bh=pAStVDcRDBFA5J6CDaBVIQvWCiwWTHU9YEpphDjiv70=; b=Jq329MCEcnOXDYJEcaCD1+QYUyRFn5JtaPcRVvyl/Fhh6Mmib8SriuCaE3GnhRi33x wBxsRIz0hHo0xyJQmFSOqO3AchrRdbwDlc/JsUH8vXxaPfaDgelMkdgtZmdqfhZdlcV2 o7orh/8Jbkxr4gxNUNLY+E5aL7tDjcQeB8Q/k= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=list-unsubscribe:list-archive:list-help:list-post :x-spam-checked-in-group:list-id:mailing-list:precedence :x-original-authentication-results:x-original-sender:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :x-gm-message-state:from:to:cc:subject:date; bh=pAStVDcRDBFA5J6CDaBVIQvWCiwWTHU9YEpphDjiv70=; b=wY3NeTxUppxlCipvmboFo3WamZppNcskZ5CF7o9z3YlH02cpRM8uRRM7fjnU+HpWYf cu7yFOvNKe1bt+Ly210l7XXhlBK6nFR59gH1t392Dn5tqkHdrNvNDarevQ67frHdepn2 FKOs2YM5/8m0nC4r7eiU1FPmArzdMeLfO3BioasVI+Fp38dFlgmwuUxuOWsMXYCYTUfR NJ9xqCf1KHy3ZbqZgLB8EDg+j38MigV9/cDJAUnehAUX5wtqVcxX4bzZOBcI/Utqoduu UvtZunuqsEfAhWrAj8FM+klr0jLkUHryjkNIsjjlMCxk5CLes2TR1Ii2xIfDwChsWXD3 d4Nw== X-Gm-Message-State: ACrzQf1Y+KZsdOfyibH2eYJa6McyCjHXIza6tr+DuOwmyWMI4r1LeEJl u47PxaIY12SPmPNJTD9ZqUwcDtJt X-Google-Smtp-Source: AMsMyM57F96TWI+j0+FIg0bUDFR4udXUUQQY1SZ84BbtsBBpLxePyb2BGIauT6+n7kEVzVlKC4Bkvg== X-Received: by 2002:aa7:c04d:0:b0:454:2f81:b966 with SMTP id k13-20020aa7c04d000000b004542f81b966mr32564443edo.269.1664354726780; Wed, 28 Sep 2022 01:45:26 -0700 (PDT) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a17:906:348a:b0:783:b20:46a0 with SMTP id g10-20020a170906348a00b007830b2046a0ls513674ejb.6.-pod-prod-gmail; Wed, 28 Sep 2022 01:45:25 -0700 (PDT) X-Received: by 2002:a17:906:7310:b0:782:cfd4:9c07 with SMTP id di16-20020a170906731000b00782cfd49c07mr20664465ejc.708.1664354725600; Wed, 28 Sep 2022 01:45:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1664354725; cv=none; d=google.com; s=arc-20160816; b=fO8gXEa+S2i2Vn2PZTVaeAzmw22Nkq7kgPnf+QgAcPRhpciJEYXa3h1U7/wux+K0M6 LOxOmhF8BGLNQx1JcFp+P1N26uOfe3ixFBbZnSQzDAxjJh9jJFIkxo6YAi00xiKfAt06 CGcG0GiUFtnFOAbvbOfKCvAYWEpkdXY1j05Uz9JI9U1fb0bMdQcUAjobbohKhCG50t6u 5SVbyQ9adT9VYMr2mIBkjb/sCawkpXJXx3jae8WcWVHhkzi147rH99fCAuCNksfpfwW4 Yx6cxmL1ProrfFCh44jB6Ma/+r2IymY858gwB24/y9aTB9voJcZdgbjx5hbiSGEEwvao E2LA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=7jdvP+NwVZ4EDodsd5IWv/WlTqEvLXasi7voixbR6Zw=; b=qpxLoLDiWYhz4WLgcawxIUSn7/+bhf0Tw8gdUQaKpubms1WSmRfNP+UtH54mNScVtF kXkX/JsBtVI0Bkl1UqDGS5s+9YmclsX+9m/Do2oD4/M6WQwWrWTR1UQhu7LbYeVCPB6g fR4z0YO9B3sodRX5WBnGGbHjsrey9sU8ySxay0SRXH4hQuqa0cUuJeRlmx7nxG8vdJwX SLxwdaWem1Pnj1pPzVy8zoIVe5QlAo8Dvw4ZZiALLHXadI3ypy1A4jxSxoeeyKd+/9mg yEeEhMp+i4it1guPxbjfoX2L5W70qUw3LEheZhU/SOVPLmVbbO8coNRzuS+UiakwQRYS 6k3Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=MiQzFdlA; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Received: from mail-sor-f41.google.com (mail-sor-f41.google.com. [209.85.220.41]) by mx.google.com with SMTPS id b22-20020a1709063f9600b0077086e34deesor1735834ejj.50.2022.09.28.01.45.25 for (Google Transport Security); Wed, 28 Sep 2022 01:45:25 -0700 (PDT) Received-SPF: pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a17:907:7245:b0:782:331b:60f4 with SMTP id ds5-20020a170907724500b00782331b60f4mr27172571ejc.594.1664354725392; Wed, 28 Sep 2022 01:45:25 -0700 (PDT) Received: from dario-ThinkPad-T14s-Gen-2i.homenet.telecomitalia.it (host-95-232-92-192.retail.telecomitalia.it. [95.232.92.192]) by smtp.gmail.com with ESMTPSA id q1-20020a50cc81000000b00457618d3409sm2928883edi.68.2022.09.28.01.45.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 28 Sep 2022 01:45:25 -0700 (PDT) From: Dario Binacchi To: u-boot@lists.denx.de Cc: Amarula patchwork , michael@amarulasolutions.com, Dario Binacchi , Lukasz Majewski , Sean Anderson , Stefano Babic Subject: [PATCH 2/7] clk: imx: gate2 support shared counter and relative clock functions Date: Wed, 28 Sep 2022 10:45:04 +0200 Message-Id: <20220928084509.2758974-3-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220928084509.2758974-1-dario.binacchi@amarulasolutions.com> References: <20220928084509.2758974-1-dario.binacchi@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: dario.binacchi@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=MiQzFdlA; spf=pass (google.com: domain of dario.binacchi@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=dario.binacchi@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , From: Michael Trimarchi Add shared counter in order to avoid to swich off clock that are already used. Signed-off-by: Michael Trimarchi Signed-off-by: Dario Binacchi --- drivers/clk/imx/clk-gate2.c | 15 ++++++++++++++- drivers/clk/imx/clk.h | 27 +++++++++++++++++++++++---- 2 files changed, 37 insertions(+), 5 deletions(-) diff --git a/drivers/clk/imx/clk-gate2.c b/drivers/clk/imx/clk-gate2.c index 40b2d4caab49..da2723023778 100644 --- a/drivers/clk/imx/clk-gate2.c +++ b/drivers/clk/imx/clk-gate2.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include "clk.h" @@ -33,6 +34,7 @@ struct clk_gate2 { u8 bit_idx; u8 cgr_val; u8 flags; + unsigned int *share_count; }; #define to_clk_gate2(_clk) container_of(_clk, struct clk_gate2, clk) @@ -42,6 +44,9 @@ static int clk_gate2_enable(struct clk *clk) struct clk_gate2 *gate = to_clk_gate2(clk); u32 reg; + if (gate->share_count && (*gate->share_count)++ > 0) + return 0; + reg = readl(gate->reg); reg &= ~(3 << gate->bit_idx); reg |= gate->cgr_val << gate->bit_idx; @@ -55,6 +60,13 @@ static int clk_gate2_disable(struct clk *clk) struct clk_gate2 *gate = to_clk_gate2(clk); u32 reg; + if (gate->share_count) { + if (WARN_ON(*gate->share_count == 0)) + return 0; + else if (--(*gate->share_count) > 0) + return 0; + } + reg = readl(gate->reg); reg &= ~(3 << gate->bit_idx); writel(reg, gate->reg); @@ -82,7 +94,7 @@ static const struct clk_ops clk_gate2_ops = { struct clk *clk_register_gate2(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, u8 cgr_val, - u8 clk_gate2_flags) + u8 clk_gate2_flags, unsigned int *share_count) { struct clk_gate2 *gate; struct clk *clk; @@ -96,6 +108,7 @@ struct clk *clk_register_gate2(struct device *dev, const char *name, gate->bit_idx = bit_idx; gate->cgr_val = cgr_val; gate->flags = clk_gate2_flags; + gate->share_count = share_count; clk = &gate->clk; diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h index 46dee35a6735..11f5dca1175b 100644 --- a/drivers/clk/imx/clk.h +++ b/drivers/clk/imx/clk.h @@ -53,7 +53,7 @@ struct clk *imx_clk_pll14xx(const char *name, const char *parent_name, struct clk *clk_register_gate2(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, u8 cgr_val, - u8 clk_gate_flags); + u8 clk_gate_flags, unsigned int *share_count); struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name, const char *parent_name, void __iomem *base, @@ -63,7 +63,26 @@ static inline struct clk *imx_clk_gate2(const char *name, const char *parent, void __iomem *reg, u8 shift) { return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg, - shift, 0x3, 0); + shift, 0x3, 0, NULL); +} + +static inline struct clk *imx_clk_gate2_shared(const char *name, + const char *parent, + void __iomem *reg, u8 shift, + unsigned int *share_count) +{ + return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg, + shift, 0x3, 0, share_count); +} + +static inline struct clk *imx_clk_gate2_shared2(const char *name, + const char *parent, + void __iomem *reg, u8 shift, + unsigned int *share_count) +{ + return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT | + CLK_OPS_PARENT_ENABLE, reg, shift, 0x3, 0, + share_count); } static inline struct clk *imx_clk_gate4(const char *name, const char *parent, @@ -71,7 +90,7 @@ static inline struct clk *imx_clk_gate4(const char *name, const char *parent, { return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE, - reg, shift, 0x3, 0); + reg, shift, 0x3, 0, NULL); } static inline struct clk *imx_clk_gate4_flags(const char *name, @@ -80,7 +99,7 @@ static inline struct clk *imx_clk_gate4_flags(const char *name, { return clk_register_gate2(NULL, name, parent, flags | CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE, - reg, shift, 0x3, 0); + reg, shift, 0x3, 0, NULL); } static inline struct clk *imx_clk_fixed_factor(const char *name,