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[209.85.220.41]) by mx.google.com with SMTPS id iw2-20020a170903044200b0018b5b4527e5sor1515553plb.150.2022.12.14.05.01.06 for (Google Transport Security); Wed, 14 Dec 2022 05:01:06 -0800 (PST) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a17:902:e8d0:b0:187:3921:2b1c with SMTP id v16-20020a170902e8d000b0018739212b1cmr25543764plg.55.1671022865974; Wed, 14 Dec 2022 05:01:05 -0800 (PST) Received: from localhost.localdomain ([2405:201:c00a:a809:5e03:faf:846e:352d]) by smtp.gmail.com with ESMTPSA id ix17-20020a170902f81100b001895f7c8a71sm1838651plb.97.2022.12.14.05.00.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Dec 2022 05:01:05 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Fancy Fang , Tim Harvey , Michael Nazzareno Trimarchi , Adam Ford , Neil Armstrong , Robert Foss , Laurent Pinchart , Tommaso Merciai , Marek Vasut Cc: Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula , Jagan Teki Subject: [PATCH v10 13/18] drm: exynos: dsi: Add Exynos based host irq hooks Date: Wed, 14 Dec 2022 18:29:02 +0530 Message-Id: <20221214125907.376148-14-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221214125907.376148-1-jagan@amarulasolutions.com> References: <20221214125907.376148-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=m56FT1oD; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Enable and disable of te_gpio's are Exynos platform specific irq handling, so add the exynos based irq operations and hook them for exynos plat_data. Signed-off-by: Jagan Teki --- Changes for v10: - split from previous series patch "drm: bridge: Generalize Exynos-DSI driver into a Samsung DSIM bridge" drivers/gpu/drm/exynos/exynos_drm_dsi.c | 55 +++++++++++++++++++++---- 1 file changed, 47 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index 819131a36b96..580e06595b37 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -291,9 +291,15 @@ struct exynos_dsim_host_ops { int (*detach)(struct exynos_dsi *dsim, struct mipi_dsi_device *device); }; +struct exynos_dsim_irq_ops { + void (*enable)(struct exynos_dsi *dsim); + void (*disable)(struct exynos_dsi *dsim); +}; + struct exynos_dsi_plat_data { enum exynos_dsi_type hw_type; const struct exynos_dsim_host_ops *host_ops; + const struct exynos_dsim_irq_ops *irq_ops; }; struct exynos_dsi { @@ -308,7 +314,6 @@ struct exynos_dsi { struct clk **clks; struct regulator_bulk_data supplies[2]; int irq; - struct gpio_desc *te_gpio; u32 pll_clk_rate; u32 burst_clk_rate; @@ -332,6 +337,7 @@ struct exynos_dsi { struct exynos_dsi_enc { struct drm_encoder encoder; + struct gpio_desc *te_gpio; }; #define host_to_dsi(host) container_of(host, struct exynos_dsi, dsi_host) @@ -1345,18 +1351,38 @@ static irqreturn_t exynos_dsi_te_irq_handler(int irq, void *dev_id) return IRQ_HANDLED; } -static void exynos_dsi_enable_irq(struct exynos_dsi *dsi) +static void _exynos_dsi_enable_irq(struct exynos_dsi *dsim) { - enable_irq(dsi->irq); + struct _exynos_dsi *dsi = dsim->priv; if (dsi->te_gpio) enable_irq(gpiod_to_irq(dsi->te_gpio)); } -static void exynos_dsi_disable_irq(struct exynos_dsi *dsi) +static void _exynos_dsi_disable_irq(struct exynos_dsi *dsim) { + struct _exynos_dsi *dsi = dsim->priv; + if (dsi->te_gpio) disable_irq(gpiod_to_irq(dsi->te_gpio)); +} + +static void exynos_dsi_enable_irq(struct exynos_dsi *dsi) +{ + const struct exynos_dsi_plat_data *pdata = dsi->plat_data; + + enable_irq(dsi->irq); + + if (pdata->irq_ops && pdata->irq_ops->enable) + pdata->irq_ops->enable(dsi); +} + +static void exynos_dsi_disable_irq(struct exynos_dsi *dsi) +{ + const struct exynos_dsi_plat_data *pdata = dsi->plat_data; + + if (pdata->irq_ops && pdata->irq_ops->disable) + pdata->irq_ops->disable(dsi); disable_irq(dsi->irq); } @@ -1385,9 +1411,10 @@ static int exynos_dsi_init(struct exynos_dsi *dsi) return 0; } -static int exynos_dsi_register_te_irq(struct exynos_dsi *dsi, +static int exynos_dsi_register_te_irq(struct exynos_dsi *dsim, struct device *panel) { + struct _exynos_dsi *dsi = dsim->priv; int ret; int te_gpio_irq; @@ -1395,7 +1422,7 @@ static int exynos_dsi_register_te_irq(struct exynos_dsi *dsi, if (!dsi->te_gpio) { return 0; } else if (IS_ERR(dsi->te_gpio)) { - dev_err(dsi->dev, "gpio request failed with %ld\n", + dev_err(dsim->dev, "gpio request failed with %ld\n", PTR_ERR(dsi->te_gpio)); return PTR_ERR(dsi->te_gpio); } @@ -1405,7 +1432,7 @@ static int exynos_dsi_register_te_irq(struct exynos_dsi *dsi, ret = request_threaded_irq(te_gpio_irq, exynos_dsi_te_irq_handler, NULL, IRQF_TRIGGER_RISING | IRQF_NO_AUTOEN, "TE", dsi); if (ret) { - dev_err(dsi->dev, "request interrupt failed with %d\n", ret); + dev_err(dsim->dev, "request interrupt failed with %d\n", ret); gpiod_put(dsi->te_gpio); return ret; } @@ -1413,8 +1440,10 @@ static int exynos_dsi_register_te_irq(struct exynos_dsi *dsi, return 0; } -static void exynos_dsi_unregister_te_irq(struct exynos_dsi *dsi) +static void exynos_dsi_unregister_te_irq(struct exynos_dsi *dsim) { + struct _exynos_dsi *dsi = dsim->priv; + if (dsi->te_gpio) { free_irq(gpiod_to_irq(dsi->te_gpio), dsi); gpiod_put(dsi->te_gpio); @@ -2035,6 +2064,11 @@ static const struct dev_pm_ops exynos_dsi_pm_ops = { pm_runtime_force_resume) }; +static const struct exynos_dsim_irq_ops exynos_dsi_irq_ops = { + .enable = _exynos_dsi_enable_irq, + .disable = _exynos_dsi_disable_irq, +}; + static const struct exynos_dsim_host_ops exynos_dsi_host_ops = { .register_host = exynos_dsi_register_host, .unregister_host = exynos_dsi_unregister_host, @@ -2045,26 +2079,31 @@ static const struct exynos_dsim_host_ops exynos_dsi_host_ops = { static const struct exynos_dsi_plat_data exynos3250_dsi_pdata = { .hw_type = DSIM_TYPE_EXYNOS3250, .host_ops = &exynos_dsi_host_ops, + .irq_ops = &exynos_dsi_irq_ops, }; static const struct exynos_dsi_plat_data exynos4210_dsi_pdata = { .hw_type = DSIM_TYPE_EXYNOS4210, .host_ops = &exynos_dsi_host_ops, + .irq_ops = &exynos_dsi_irq_ops, }; static const struct exynos_dsi_plat_data exynos5410_dsi_pdata = { .hw_type = DSIM_TYPE_EXYNOS5410, .host_ops = &exynos_dsi_host_ops, + .irq_ops = &exynos_dsi_irq_ops, }; static const struct exynos_dsi_plat_data exynos5422_dsi_pdata = { .hw_type = DSIM_TYPE_EXYNOS5422, .host_ops = &exynos_dsi_host_ops, + .irq_ops = &exynos_dsi_irq_ops, }; static const struct exynos_dsi_plat_data exynos5433_dsi_pdata = { .hw_type = DSIM_TYPE_EXYNOS5433, .host_ops = &exynos_dsi_host_ops, + .irq_ops = &exynos_dsi_irq_ops, }; static const struct of_device_id exynos_dsi_of_match[] = {