From patchwork Mon Jan 23 15:12:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 2663 Return-Path: X-Original-To: linux-amarula@patchwork.amarulasolutions.com Delivered-To: linux-amarula@patchwork.amarulasolutions.com Received: from mail-pj1-f72.google.com (mail-pj1-f72.google.com [209.85.216.72]) by ganimede.amarulasolutions.com (Postfix) with ESMTPS id 4AF3F3F039 for ; Mon, 23 Jan 2023 16:13:37 +0100 (CET) Received: by mail-pj1-f72.google.com with SMTP id x12-20020a17090abc8c00b00229f8cb27a5sf4083192pjr.1 for ; Mon, 23 Jan 2023 07:13:37 -0800 (PST) ARC-Seal: i=2; a=rsa-sha256; t=1674486816; cv=pass; d=google.com; s=arc-20160816; b=QLkfQa9kOliD8NlvLlKmMNO78zzC9LWYa04OzUHGuf8+bulbmt5aEETr8ISdjHhkGn KQF92Py/eNmh7RLEKp0VYfvRzCDUmPjP4FJ1QlRZf240MMYHc3rCaJrkwqoT3sI645tb 24ELIem7H+dPPZf2INuszbk+jBY0RuNgnke87OxqQ6yHAHATz5olqkTMzPWDPvxNWonG iocds+xlnhEtm5g7mNvUbj9kYFxbCfjiXhkUBZC91fkzxsnR4NO5IsrePq0GN46RXeic +OXs6u43WdtHmNH1QOWjqeEmPFtmOh/W2FgYIFbjQ6v/nj1Y7IUCEaUrHz6e5uGcb7L1 AvRA== ARC-Message-Signature: i=2; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=/r+Rp44y/rADMooKmX9HI+58ggoF1KouygHlGrmsMAI=; b=xv6KHumFd1JrPR88/9OVmuP4QGPwCldMxBtEhtzGxFiyNl1/cTJcwNRgC1b0hKI7nT AnqA8A8+RGmDmp0SROKKEaTYDzlbzdN8RYhTSl/M6NHZ5+HiZv+aAwpReHhird+PCe2i QH2lygAadncWrd8cCdzVG3Nn0zejttipivxDRAe8PUZwA/57QMYqXS2G6JJkOtDD+cvU Gm5AGdXrGSrXErrbED0QJSYgbxi18izgCZJvLBWF8DLImra6M5VWKC7BTJUdjONsIq38 JBETfxSOrE+fDLMDXtvK1tIQelDnXuRBnIbMoXyIfaz/GlNBnr4rpX0EudLLZ8mkQK8p WrsA== ARC-Authentication-Results: i=2; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=ZQqEnbOC; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=list-unsubscribe:list-archive:list-help:list-post:list-id :mailing-list:precedence:x-original-authentication-results :x-original-sender:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:from:to:cc:subject:date:message-id:reply-to; bh=/r+Rp44y/rADMooKmX9HI+58ggoF1KouygHlGrmsMAI=; b=cZEoU0EFnyOh7tPcUVQfYseQLBfIQICQHjCJfi7iMc3t/7R0el9MofUqOlyB+J934+ oc5x066kcn7cNDf/RZA12WEISEWh9wU4xiVFVIINN2PUPUVgNFNEMcb55fkl5jfrnixN nbv61CIzW2Q9bVF3cWURfzKvmDZ7ZHmmQA3E0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=list-unsubscribe:list-archive:list-help:list-post :x-spam-checked-in-group:list-id:mailing-list:precedence :x-original-authentication-results:x-original-sender:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=/r+Rp44y/rADMooKmX9HI+58ggoF1KouygHlGrmsMAI=; b=JzSvpTfkLvEy3O3SqyRf9nZW2EU+YzM3lNeo6+IaGrLH6Kcs5D19h98qljrXONbRXu 63sOBbdacFyMTq2gAMO2fAa70swg0RGz7XPIm50mjcWwx7oabKswFkvEBOjRSDBIdrS1 KDI8uTiV/q0nvpuFcxGX8ufKHjLZVSDNnDq+pEG+fsXG52sWavMeQxVWPFLm6s60LITH 2yQFzAwO1FJha47jrWzS9qBkJ319/N/yaK8DVO28H9N6VhcupGPV78y4OAyAsWMGbMTJ rk6y8HbJBFYyelT31qftOURQtEkV4x+g7AqAV98uhkWsLzX4XDnU8+j0zUIB340xjEmR MM4Q== X-Gm-Message-State: AFqh2kou4eOq+4zfVd94u0HIwr4Q2EsGNvMYJI1kIg2vy7aafj4i1Ynq 16j6kF2wjP8N2JygHB6EY94Z6/f2 X-Google-Smtp-Source: AMrXdXt8hMcX9/YK+EJmfvbsqx4X6w2qo9dJV3txRD9PQYIU2A3WZ+EQaphU7DoS7I77u8ooRUddMg== X-Received: by 2002:a63:ff4e:0:b0:4ad:1c64:54c2 with SMTP id s14-20020a63ff4e000000b004ad1c6454c2mr2432254pgk.233.1674486816063; Mon, 23 Jan 2023 07:13:36 -0800 (PST) X-BeenThere: linux-amarula@amarulasolutions.com Received: by 2002:a17:902:ab8c:b0:191:1e85:3329 with SMTP id f12-20020a170902ab8c00b001911e853329ls13130636plr.3.-pod-prod-gmail; Mon, 23 Jan 2023 07:13:35 -0800 (PST) X-Received: by 2002:a17:902:a408:b0:194:98ef:db00 with SMTP id p8-20020a170902a40800b0019498efdb00mr24531892plq.19.1674486815211; Mon, 23 Jan 2023 07:13:35 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1674486815; cv=none; d=google.com; s=arc-20160816; b=le7S6Zk+C6E8fpGQjfElCbUMv7sgteRcQxIb6Zygw8OkTTuPlD5HoVXfprNY2yY2sp RLFm2J3bVUxRSw6ko9UIbRM3Nga0KdU/j5TpwpgGqRcdHLrb4elGfLRZtZlp8j2QQFv1 vjOO2McDxjAJXNKMifh+fEnoHrtnxwVS43SIaVBRqlZGaf4AIeLfsxoAmo3M0fUWv+o7 wqY8oV2b7Ga6DhymA8ZqF9S6RQO7qrz7PW1PTGJkmD6yokuGx1Tky2ITxLxbcJGVDX13 Je9Vfvzia5BhoUy1ebTorCrgM8XvoYFaY61MCz39MR+MxflspGGgQNHQnXwZcrBehI1s 9LTA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=ZmqEZ1iXO1eGhLfnNAeBU9ZBQZ2NXFn8ddY5s0UykPQ=; b=k3Rg1jvrV5zR7LvaK6SfWI+w3XYXA724nvAIxhSOvIZGbkch3Zh9sFFOWG8S3cmMV4 GuQcWTk3CjIcSoQ4DsSTcp6nFYQM8cTe8dMGVlTUUhT7yyJMLQ1TAKEb8Qp//gd5Szdd +4ne1QSySAG4rTaEiRzS/F3XzM+cDdMvXj7FzD7h4YY565yWmQh/zGh5bL12rYRp6y+b CPJDA/bTeC6MPMVtHdnpaLncRuiNm7k9i0o2/4nCh/65WXlVnn9Y34RQkJdR1syt6+R9 6ZPBW63F5aPTJO6vOF1R8D8TfQTDrTOUJzfSuVEuXS5dmqBEjuvMiMDeXsfjI37gIR81 BEmA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=ZQqEnbOC; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Received: from mail-sor-f41.google.com (mail-sor-f41.google.com. [209.85.220.41]) by mx.google.com with SMTPS id q3-20020a170902dac300b00192c0d359b4sor1802576plx.105.2023.01.23.07.13.35 for (Google Transport Security); Mon, 23 Jan 2023 07:13:35 -0800 (PST) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a17:902:cecd:b0:192:816c:8c31 with SMTP id d13-20020a170902cecd00b00192816c8c31mr20532623plg.35.1674486814831; Mon, 23 Jan 2023 07:13:34 -0800 (PST) Received: from localhost.localdomain ([2405:201:c00a:a15f:2279:f361:f93b:7971]) by smtp.gmail.com with ESMTPSA id d5-20020a170903230500b001754fa42065sm19207111plh.143.2023.01.23.07.13.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Jan 2023 07:13:34 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Joonyoung Shim , Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Fancy Fang , Tim Harvey , Michael Nazzareno Trimarchi , Adam Ford , Neil Armstrong , Robert Foss , Laurent Pinchart , Tommaso Merciai , Marek Vasut Cc: Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP Linux Team , linux-amarula , Jagan Teki Subject: [RESEND PATCH v11 09/18] drm: exynos: dsi: Add atomic check Date: Mon, 23 Jan 2023 20:42:03 +0530 Message-Id: <20230123151212.269082-10-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230123151212.269082-1-jagan@amarulasolutions.com> References: <20230123151212.269082-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=ZQqEnbOC; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , Look like an explicit fixing up of mode_flags is required for DSIM IP present in i.MX8M Mini/Nano SoCs. At least the LCDIF + DSIM needs active low sync polarities in order to correlate the correct sync flags of the surrounding components in the chain to make sure the whole pipeline can work properly. On the other hand the i.MX 8M Mini Applications Processor Reference Manual, Rev. 3, 11/2020 says. "13.6.3.5.2 RGB interface Vsync, Hsync, and VDEN are active high signals." i.MX 8M Mini Applications Processor Reference Manual Rev. 3, 11/2020 3.6.3.5.2 RGB interface i.MX 8M Nano Applications Processor Reference Manual Rev. 2, 07/2022 13.6.2.7.2 RGB interface both claim "Vsync, Hsync, and VDEN are active high signals.", the LCDIF must generate inverted HS/VS/DE signals, i.e. active LOW. No clear evidence about whether it can be documentation issues or something, so added proper comments on the code. Comments are suggested by Marek Vasut. Reviewed-by: Frieder Schrempf Signed-off-by: Jagan Teki Reviewed-by: Marek Vasut --- Changes for v11: - collect RB from Frieder - fix commit message Changes for v10, v9: - none Changes for v8: - update the comments about sync signals polarities - added clear commit message by including i.MX8M Nano details Changes for v7: - fix the hw_type checking logic Changes for v6: - none Changes for v5: - rebase based new bridge changes [mszyprow] - remove DSIM_QUIRK_FIXUP_SYNC_POL - add hw_type check for sync polarities change. Changes for v4: - none Changes for v3: - add DSIM_QUIRK_FIXUP_SYNC_POL to handle mode_flasg fixup Changes for v2: - none Changes for v1: - fix mode flags in atomic_check instead of mode_fixup drivers/gpu/drm/exynos/exynos_drm_dsi.c | 28 +++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index d4a976d86f08..d8958838ab7b 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -263,6 +263,7 @@ enum exynos_dsi_type { DSIM_TYPE_EXYNOS5410, DSIM_TYPE_EXYNOS5422, DSIM_TYPE_EXYNOS5433, + DSIM_TYPE_IMX8MM, DSIM_TYPE_COUNT, }; @@ -1465,6 +1466,32 @@ static void exynos_dsi_atomic_post_disable(struct drm_bridge *bridge, pm_runtime_put_sync(dsi->dev); } +static int exynos_dsi_atomic_check(struct drm_bridge *bridge, + struct drm_bridge_state *bridge_state, + struct drm_crtc_state *crtc_state, + struct drm_connector_state *conn_state) +{ + struct exynos_dsi *dsi = bridge_to_dsi(bridge); + struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode; + + /* + * The i.MX8M Mini/Nano glue logic between LCDIF and DSIM + * inverts HS/VS/DE sync signals polarity, therefore, while + * i.MX 8M Mini Applications Processor Reference Manual Rev. 3, 11/2020 + * 13.6.3.5.2 RGB interface + * i.MX 8M Nano Applications Processor Reference Manual Rev. 2, 07/2022 + * 13.6.2.7.2 RGB interface + * both claim "Vsync, Hsync, and VDEN are active high signals.", the + * LCDIF must generate inverted HS/VS/DE signals, i.e. active LOW. + */ + if (dsi->plat_data->hw_type == DSIM_TYPE_IMX8MM) { + adjusted_mode->flags |= (DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC); + adjusted_mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC); + } + + return 0; +} + static void exynos_dsi_mode_set(struct drm_bridge *bridge, const struct drm_display_mode *mode, const struct drm_display_mode *adjusted_mode) @@ -1487,6 +1514,7 @@ static const struct drm_bridge_funcs exynos_dsi_bridge_funcs = { .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, .atomic_reset = drm_atomic_helper_bridge_reset, + .atomic_check = exynos_dsi_atomic_check, .atomic_pre_enable = exynos_dsi_atomic_pre_enable, .atomic_enable = exynos_dsi_atomic_enable, .atomic_disable = exynos_dsi_atomic_disable,