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[209.85.220.41]) by mx.google.com with SMTPS id jb1-20020a170903258100b0019e21d2ed28sor7234124plb.199.2023.03.08.08.41.04 for (Google Transport Security); Wed, 08 Mar 2023 08:41:04 -0800 (PST) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:a17:903:24f:b0:19e:7a2c:78a7 with SMTP id j15-20020a170903024f00b0019e7a2c78a7mr20928369plh.57.1678293664454; Wed, 08 Mar 2023 08:41:04 -0800 (PST) Received: from localhost.localdomain ([2405:201:c00a:a8a1:b545:91cc:80b2:f9fe]) by smtp.gmail.com with ESMTPSA id kq3-20020a170903284300b0019b9a075f1fsm10046540plb.80.2023.03.08.08.40.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Mar 2023 08:41:03 -0800 (PST) From: Jagan Teki To: Andrzej Hajda , Inki Dae , Marek Szyprowski , Neil Armstrong , Marek Vasut , Maxime Ripard Cc: Seung-Woo Kim , Kyungmin Park , Frieder Schrempf , Tim Harvey , Adam Ford , Matteo Lisi , dri-devel@lists.freedesktop.org, linux-samsung-soc@vger.kernel.org, linux-amarula , Jagan Teki Subject: [PATCH v16 08/16] drm: exynos: dsi: Add input_bus_flags Date: Wed, 8 Mar 2023 22:09:45 +0530 Message-Id: <20230308163953.28506-9-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230308163953.28506-1-jagan@amarulasolutions.com> References: <20230308163953.28506-1-jagan@amarulasolutions.com> MIME-Version: 1.0 X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=gLVZ9B2i; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Content-Type: text/plain; charset="UTF-8" Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , LCDIF-DSIM glue logic inverts the HS/VS/DE signals and expecting the i.MX8M Mini/Nano DSI host to add additional Data Enable signal active low (DE_LOW). This makes the valid data transfer on each horizontal line. So, add additional bus flags DE_LOW setting via input_bus_flags for i.MX8M Mini/Nano platforms. Tested-by: Marek Szyprowski Reviewed-by: Marek Vasut Reviewed-by: Frieder Schrempf Suggested-by: Marek Vasut Signed-off-by: Jagan Teki --- Changes for v16: - collect TB from Marek S Changes for v15, v13: - none Changes for v12: - collect RB from Marek Changes for v11: - collect RB from Frieder Changes for v10, v9: - none Changes for v8: - add DE_LOW for i.MX8M Mini/Nano platforms. Changes for v7, v6: - none Changes for v5: - rebased based on updated bridge changes Changes for v4 - v1: - none drivers/gpu/drm/exynos/exynos_drm_dsi.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/exynos/exynos_drm_dsi.c b/drivers/gpu/drm/exynos/exynos_drm_dsi.c index df4d95ae8aad..0c480be5f070 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_dsi.c +++ b/drivers/gpu/drm/exynos/exynos_drm_dsi.c @@ -1736,6 +1736,10 @@ static const struct component_ops exynos_dsi_component_ops = { .unbind = exynos_dsi_unbind, }; +static const struct drm_bridge_timings dsim_bridge_timings_de_low = { + .input_bus_flags = DRM_BUS_FLAG_DE_LOW, +}; + static int exynos_dsi_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -1822,6 +1826,10 @@ static int exynos_dsi_probe(struct platform_device *pdev) dsi->bridge.type = DRM_MODE_CONNECTOR_DSI; dsi->bridge.pre_enable_prev_first = true; + /* DE_LOW: i.MX8M Mini/Nano LCDIF-DSIM glue logic inverts HS/VS/DE */ + if (dsi->plat_data->hw_type == DSIM_TYPE_IMX8MM) + dsi->bridge.timings = &dsim_bridge_timings_de_low; + ret = component_add(dev, &exynos_dsi_component_ops); if (ret) goto err_disable_runtime;