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[209.85.220.41]) by mx.google.com with SMTPS id e7-20020a056a00162700b005a8de206b2asor12237421pfc.67.2023.03.28.09.51.47 for (Google Transport Security); Tue, 28 Mar 2023 09:51:47 -0700 (PDT) Received-SPF: pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) client-ip=209.85.220.41; X-Received: by 2002:aa7:942c:0:b0:627:e577:4331 with SMTP id y12-20020aa7942c000000b00627e5774331mr15225845pfo.1.1680022306677; Tue, 28 Mar 2023 09:51:46 -0700 (PDT) Received: from localhost.localdomain ([2405:201:c00a:a047:2fbc:aff5:d52a:cc2c]) by smtp.gmail.com with ESMTPSA id 15-20020aa7910f000000b0062c0cfbb264sm7583700pfh.93.2023.03.28.09.51.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Mar 2023 09:51:46 -0700 (PDT) From: Jagan Teki To: Dave Stevenson , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Andrzej Hajda , Neil Armstrong Cc: Marek Vasut , linux-amarula , Jagan Teki Subject: [PATCH 2/2] drm/bridge: Document bridge init order with pre_enable_prev_first Date: Tue, 28 Mar 2023 22:20:58 +0530 Message-Id: <20230328165058.1100680-2-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230328165058.1100680-1-jagan@amarulasolutions.com> References: <20230328165058.1100680-1-jagan@amarulasolutions.com> MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" X-Original-Sender: jagan@amarulasolutions.com X-Original-Authentication-Results: mx.google.com; dkim=pass header.i=@amarulasolutions.com header.s=google header.b=YHye6rKB; spf=pass (google.com: domain of jagan@amarulasolutions.com designates 209.85.220.41 as permitted sender) smtp.mailfrom=jagan@amarulasolutions.com; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=amarulasolutions.com Precedence: list Mailing-list: list linux-amarula@amarulasolutions.com; contact linux-amarula+owners@amarulasolutions.com List-ID: X-Spam-Checked-In-Group: linux-amarula@amarulasolutions.com X-Google-Group-Id: 476853432473 List-Post: , List-Help: , List-Archive: List-Unsubscribe: , In order to satisfy the MIPI DSI initialization sequence the bridge init order has been altered with the help of pre_enable_prev_first in pre_enable and post_disable bridge operations. Document the affected bridge init order with an example on the bridge operations helpers. Signed-off-by: Jagan Teki --- drivers/gpu/drm/drm_bridge.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/gpu/drm/drm_bridge.c b/drivers/gpu/drm/drm_bridge.c index 052a8e6c9961..8342473f251c 100644 --- a/drivers/gpu/drm/drm_bridge.c +++ b/drivers/gpu/drm/drm_bridge.c @@ -654,6 +654,13 @@ static void drm_atomic_bridge_call_post_disable(struct drm_bridge *bridge, * bridge will be called before the previous one to reverse the @pre_enable * calling direction. * + * Example: + * Bridge A ---> Bridge B ---> Bridge C ---> Bridge D ---> Bridge E + * + * With pre_enable_prev_first flag enable in Bridge B, D, E then the resulting + * post_disable order would be, + * Bridge B, Bridge A, Bridge E, Bridge D, Bridge C. + * * Note: the bridge passed should be the one closest to the encoder */ void drm_atomic_bridge_chain_post_disable(struct drm_bridge *bridge, @@ -750,6 +757,13 @@ static void drm_atomic_bridge_call_pre_enable(struct drm_bridge *bridge, * If a bridge sets @pre_enable_prev_first, then the pre_enable for the * prev bridge will be called before pre_enable of this bridge. * + * Example: + * Bridge A ---> Bridge B ---> Bridge C ---> Bridge D ---> Bridge E + * + * With pre_enable_prev_first flag enable in Bridge B, D, E then the resulting + * pre_enable order would be, + * Bridge C, Bridge D, Bridge E, Bridge A, Bridge B. + * * Note: the bridge passed should be the one closest to the encoder */ void drm_atomic_bridge_chain_pre_enable(struct drm_bridge *bridge,